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wr2rf-vme
Commit 6784f351 authored by Tristan Gingold's avatar Tristan Gingold
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bmctrl: add comments, re-indent, add off and status

parent b54d0348
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Showing with 208 additions and 157 deletions
hdl/rtl/registers/wr2rf_init_regs.cheby
View file @ 6784f351
......@@ -839,12 +839,15 @@ memory-map:
children:
- field:
name: reset
description: Reset fifo
range: 0
- field:
name: en
description: Enable playing from the fifo
range: 1
- field:
name: update
description: Write txframe to the fifo
range: 2
x-hdl:
type: wire
......
software/libwr2rf/wr2rf.c
View file @ 6784f351
......@@ -637,24 +637,23 @@ usage:
static void
nco_wrctrl (struct libwr2rf_dev *dev, int argc, char **argv)
{
unsigned long ctrl;
unsigned short before;
unsigned short after;
unsigned long ctrl;
unsigned short before;
unsigned short after;
if (argc != 2) {
printf("Expected %s <val>\n", argv[0]);
return;
} else {
ctrl = strtoul(argv[1], NULL, 0);
before = libwr2rf_read16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_NCO_CTRL);
libwr2rf_write16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_NCO_CTRL, ctrl);
libwr2rf_write16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_NCO_UPDATE,
WR2RF_INIT_REGS_NCO_UPDATE_VALID);
after = libwr2rf_read16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_NCO_CTRL);
printf("before=%04x after=%04x expected=%04lx %s\n",
before, after, ctrl, (ctrl != after ? "ERROR" : ""));
}
if (argc != 2) {
printf("Expected %s <val>\n", argv[0]);
return;
}
ctrl = strtoul(argv[1], NULL, 0);
before = libwr2rf_read16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_NCO_CTRL);
libwr2rf_write16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_NCO_CTRL, ctrl);
libwr2rf_write16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_NCO_UPDATE,
WR2RF_INIT_REGS_NCO_UPDATE_VALID);
after = libwr2rf_read16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_NCO_CTRL);
printf("before=%04x after=%04x expected=%04lx %s\n",
before, after, ctrl, (ctrl != after ? "ERROR" : ""));
}
static void
......@@ -663,23 +662,15 @@ nco_lcfg (struct libwr2rf_dev *dev, int argc, char **argv)
unsigned long long ftw = 0x16B24A8FB6;
unsigned long long LO0 = 0x1C9BA5E300000;//223.5 MHz
unsigned long long LO1 = 0x1C9BA5E300000;//223.5 MHz
unsigned off = 0;
unsigned base = 0;
unsigned harmonic = 4620;
unsigned control = RFNCO_CONTROL_SOFTLOAD;
unsigned nco_ftw_addr = RFNCO_FTW_H1;
unsigned nco_harmonic_addr = RFNCO_INPUTS_H;
unsigned nco_LO0_addr = RFNCO_FTW_LO0;
unsigned nco_LO1_addr = RFNCO_FTW_LO1;
unsigned nco_ftw_on_addr = RFNCO_FTW_ON;
unsigned nco_ftw_offsetfsk_addr = RFNCO_INPUTS_OFFSETFSK;
unsigned nco_ftw_slip_addr = RFNCO_FTW_SLIP;
unsigned nco_control_addr = RFNCO_CONTROL;
if (argc == 2 || argc == 3) {
if (strcmp (argv[1], "1") == 0)
off = WR2RF_VME_REGS_CTRL + WR2RF_CTRL_REGS_RF1_RFNCO;
base = WR2RF_VME_REGS_CTRL + WR2RF_CTRL_REGS_RF1_RFNCO;
else if (strcmp (argv[1], "2") == 0)
off = WR2RF_VME_REGS_CTRL + WR2RF_CTRL_REGS_RF2_RFNCO;
base = WR2RF_VME_REGS_CTRL + WR2RF_CTRL_REGS_RF2_RFNCO;
else {
printf ("Received unexpected channel (got %s)\n", argv[1]);
return;
......@@ -692,47 +683,18 @@ nco_lcfg (struct libwr2rf_dev *dev, int argc, char **argv)
return;
}
nco_ftw_addr += off;
nco_LO0_addr += off;
nco_LO1_addr += off;
nco_harmonic_addr += off;
nco_ftw_on_addr += off;
nco_ftw_offsetfsk_addr += off;
nco_ftw_slip_addr += off;
nco_control_addr += off;
printf("Supplied ftw=0x%016llx\n", ftw);
// write ftw
libwr2rf_16x32_write32(dev, nco_ftw_addr+0, ftw);
libwr2rf_16x32_write32(dev, nco_ftw_addr+4, ftw>>32);
libwr2rf_16x32_write32(dev, nco_LO0_addr+0, LO0);
libwr2rf_16x32_write32(dev, nco_LO0_addr+4, LO0>>32);
libwr2rf_16x32_write32(dev, nco_LO1_addr+0, LO1);
libwr2rf_16x32_write32(dev, nco_LO1_addr+4, LO1>>32);
libwr2rf_16x32_write32(dev, nco_harmonic_addr, harmonic);
libwr2rf_16x32_write32(dev, nco_control_addr, control);
libwr2rf_16x32_write32(dev, base + RFNCO_FTW_H1 + 0, ftw);
libwr2rf_16x32_write32(dev, base + RFNCO_FTW_H1 + 4, ftw>>32);
printf("nco_ftw_addr=%x nco_L00_addr=%x nco_LO1_addr=%x nco_harmonic_addr=%x nco_control_addr=%x\n",
nco_ftw_addr, nco_LO0_addr, nco_LO1_addr, nco_harmonic_addr, nco_control_addr );
printf("ftw=%08x.%08x LO=%08x.%08x L1=%08x.%08x harmonic=%08x control=%08x \n",
libwr2rf_16x32_read32(dev, nco_ftw_addr+4),
libwr2rf_16x32_read32(dev, nco_ftw_addr+0),
libwr2rf_16x32_read32(dev, nco_LO0_addr+4),
libwr2rf_16x32_read32(dev, nco_LO0_addr+0),
libwr2rf_16x32_read32(dev, nco_LO1_addr+4),
libwr2rf_16x32_read32(dev, nco_LO1_addr+0),
libwr2rf_16x32_read32(dev, nco_harmonic_addr),
libwr2rf_16x32_read32(dev, nco_control_addr) );
printf("ftw_on=%08x.%08x offset_fsk=%08x.%08x ftw_slip=%08x \n",
libwr2rf_16x32_read32(dev, nco_ftw_on_addr+4),
libwr2rf_16x32_read32(dev, nco_ftw_on_addr+0),
libwr2rf_16x32_read32(dev, nco_ftw_offsetfsk_addr+4),
libwr2rf_16x32_read32(dev, nco_ftw_offsetfsk_addr+0),
libwr2rf_16x32_read32(dev, nco_ftw_slip_addr));
libwr2rf_16x32_write32(dev, base + RFNCO_FTW_LO0 + 0, LO0);
libwr2rf_16x32_write32(dev, base + RFNCO_FTW_LO0 + 4, LO0>>32);
libwr2rf_16x32_write32(dev, base + RFNCO_FTW_LO1 + 0, LO1);
libwr2rf_16x32_write32(dev, base + RFNCO_FTW_LO1 + 4, LO1>>32);
libwr2rf_16x32_write32(dev, base + RFNCO_INPUTS_H, harmonic);
libwr2rf_16x32_write32(dev, base + RFNCO_CONTROL, control);
}
static void
......@@ -770,6 +732,7 @@ usage:
printf ("Usage: %s [ctrl ftw]\n", argv[0]);
}
/* Configure NCO for WR input. */
static void
nco_wrcfg (struct libwr2rf_dev *dev, int argc, char **argv)
{
......@@ -836,103 +799,169 @@ nco_wrcfg (struct libwr2rf_dev *dev, int argc, char **argv)
static void
nco_status (struct libwr2rf_dev *dev, int argc, char **argv)
{
unsigned off = WR2RF_VME_REGS_CTRL;
unsigned nco_ftw_addr = RFNCO_FTW;
unsigned nco_harmonic_addr = RFNCO_INPUTS_H;
unsigned nco_phaseh1_addr = RFNCO_PHASES_H1;
unsigned nco_phaseh1main_addr = RFNCO_PHASES_H1MAIN;
unsigned nco_phaseif0_addr = RFNCO_PHASES_IF0;
unsigned nco_phaseif1_addr = RFNCO_PHASES_IF1;
unsigned nco_ftw_on_addr = RFNCO_FTW_ON;
unsigned nco_ftw_offsetfsk_addr = RFNCO_INPUTS_OFFSETFSK;
unsigned nco_ftw_slip_addr = RFNCO_FTW_SLIP;
unsigned nco_ftw_lo0_addr = RFNCO_FTW_LO0;
unsigned nco_ftw_lo1_addr = RFNCO_FTW_LO1;
unsigned nco_control_addr = RFNCO_CONTROL;
unsigned nco_status_addr = RFNCO_STATUS;
unsigned nco_pres_latch_addr = RFNCO_PRESENTLATCH;
unsigned nco_coef_addr = RFNCO_READBACK_COEF;
unsigned nco_tw_addr = RFNCO_READBACK_TW;
unsigned nco_phaseH1Comp_addr = RFNCO_READBACK_PHASEH1COMP;
unsigned base = WR2RF_VME_REGS_CTRL;
unsigned i;
unsigned flag_dump = 0;
unsigned control;
unsigned status;
if (argc == 2) {
if (strcmp (argv[1], "1") == 0)
off += WR2RF_CTRL_REGS_RF1_RFNCO;
else if (strcmp (argv[1], "2") == 0)
off += WR2RF_CTRL_REGS_RF2_RFNCO;
if (argc < 2) {
printf ("usage: %s 1|2 [dump]\n", argv[0]);
return;
}
if (strcmp (argv[1], "1") == 0)
base += WR2RF_CTRL_REGS_RF1_RFNCO;
else if (strcmp (argv[1], "2") == 0)
base += WR2RF_CTRL_REGS_RF2_RFNCO;
else {
printf ("Received unexpected channel (got %s)\n", argv[1]);
return;
}
for (i = 2; i < argc; i++) {
if (strcmp(argv[i], "dump") == 0)
flag_dump = 1;
else {
printf ("Received unexpected channel (got %s)\n", argv[1]);
printf ("unknown option %s, try %s (without args)\n",
argv[i], argv[0]);
return;
}
} else {
printf ("usage: %s 1|2 \n", argv[0]);
return;
}
nco_ftw_addr += off;
nco_harmonic_addr += off;
nco_phaseh1_addr += off;
nco_phaseh1main_addr += off;
nco_phaseif0_addr += off;
nco_phaseif1_addr += off;
nco_ftw_on_addr += off;
nco_ftw_offsetfsk_addr += off;
nco_ftw_slip_addr += off;
nco_ftw_lo0_addr += off;
nco_ftw_lo1_addr += off;
nco_control_addr += off;
nco_status_addr += off;
nco_pres_latch_addr += off;
nco_coef_addr += off;
nco_tw_addr += off;
nco_phaseH1Comp_addr += off;
printf ("RFNCO_FTW=%08x.%08x \n",
libwr2rf_16x32_read32(dev, nco_ftw_addr+4),
libwr2rf_16x32_read32(dev, nco_ftw_addr+0) );
printf ("RFNCO_FTW_H=%08x \n",
libwr2rf_16x32_read32(dev, nco_harmonic_addr+0) );
printf ("RFNCO_PHASEH1=%08x.%08x \n",
libwr2rf_16x32_read32(dev, nco_phaseh1_addr+4),
libwr2rf_16x32_read32(dev, nco_phaseh1_addr+0) );
printf ("RFNCO_PHASEH1MAIN=%08x.%08x \n",
libwr2rf_16x32_read32(dev, nco_phaseh1main_addr+4),
libwr2rf_16x32_read32(dev, nco_phaseh1main_addr+0) );
printf ("RFNCO_PHASE_IF0=%08x.%08x \n",
libwr2rf_16x32_read32(dev, nco_phaseif0_addr+4),
libwr2rf_16x32_read32(dev, nco_phaseif0_addr+0) );
printf ("RFNCO_PHASE_IF1=%08x.%08x \n",
libwr2rf_16x32_read32(dev, nco_phaseif1_addr+4),
libwr2rf_16x32_read32(dev, nco_phaseif1_addr+0) );
printf ("RFNCO_CONTROL=%08x \n",
libwr2rf_16x32_read32(dev, nco_control_addr+0) );
printf ("RFNCO_STATUS=%08x \n",
libwr2rf_16x32_read32(dev, nco_status_addr+0) );
printf ("RFNCO_PRESENT_LATCH=%08x \n",
libwr2rf_16x32_read32(dev, nco_pres_latch_addr+0) );
control = libwr2rf_16x32_read32(dev, base + RFNCO_CONTROL);
printf ("control=%08x", control);
if (control & RFNCO_CONTROL_RESET)
printf (" reset");
if (control & RFNCO_CONTROL_SOFTLOAD)
printf (" softload");
if (control & RFNCO_CONTROL_SELFTWLO0)
printf (" selftwlo0");
if (control & RFNCO_CONTROL_SELFTWLO1)
printf (" selftwlo1");
if (control & RFNCO_CONTROL_SELOFFSETH1)
printf (" seloffseth1");
if (control & RFNCO_CONTROL_SELOFFSETFSKH1)
printf (" seloffsetfskh1");
if (control & RFNCO_CONTROL_SELRATE)
printf (" selrate");
if (control & RFNCO_CONTROL_SELFTWH1)
printf (" selftwh1");
if (control & RFNCO_CONTROL_SELFTWH1ON)
printf (" selftwh1on");
if (control & RFNCO_CONTROL_SELWRFTWH1)
printf (" selwrftwh1");
if (control & RFNCO_CONTROL_SELWRDFTWH1SLIP)
printf (" selwrdftwh1slip");
if (control & RFNCO_CONTROL_SELDFTWH1SLIP)
printf (" seldftwh1slip");
if (control & RFNCO_CONTROL_SELFTWH1PROG)
printf (" selftwh1prog");
if (control & RFNCO_CONTROL_SLIPSIGN)
printf (" slipsign");
if (control & RFNCO_CONTROL_ENABLEFSK)
printf (" enablefsk");
if (control & RFNCO_CONTROL_RESETFSK)
printf (" resetfsk");
if (control & RFNCO_CONTROL_ENABLESLIP)
printf (" enableslip");
if (control & RFNCO_CONTROL_RESETSLIP)
printf (" resetslip");
if (control & RFNCO_CONTROL_SIGNIF0)
printf (" signif0");
if (control & RFNCO_CONTROL_SIGNIF1)
printf (" signif1");
if (control & RFNCO_CONTROL_EXTRESETENABLE)
printf (" extresetenable");
if (control & RFNCO_CONTROL_LATCHPHASES)
printf (" latchphases");
if (control & RFNCO_CONTROL_SELLOAD)
printf (" selload");
if (control & RFNCO_CONTROL_ENABLEFREQDOUBLING)
printf (" enablefreqdoubling");
if (control & RFNCO_CONTROL_FORCEAM)
printf (" forceam");
printf("\n");
status = libwr2rf_16x32_read32(dev, base + RFNCO_STATUS);
printf ("status=%08x", status);
if (status & RFNCO_STATUS_INTERLOCK)
printf (" interlock");
if (status & RFNCO_STATUS_PHASEH1VLD)
printf (" phaseh1vld");
if (status & RFNCO_STATUS_AMAUTOON)
printf (" amautoon");
printf("\n");
printf ("ftw.h1=%08x.%08x \n",
libwr2rf_16x32_read32(dev, base + RFNCO_FTW_H1 + 4),
libwr2rf_16x32_read32(dev, base + RFNCO_FTW_H1 + 0));
printf ("ftw.h1prog=%08x.%08x \n",
libwr2rf_16x32_read32(dev, base + RFNCO_FTW_H1PROG + 4),
libwr2rf_16x32_read32(dev, base + RFNCO_FTW_H1PROG + 0));
printf ("ftw.on=%08x.%08x \n",
libwr2rf_16x32_read32(dev, base + RFNCO_FTW_ON + 4),
libwr2rf_16x32_read32(dev, base + RFNCO_FTW_ON + 0));
printf ("ftw.lo0=%08x.%08x \n",
libwr2rf_16x32_read32(dev, base + RFNCO_FTW_LO0 + 4),
libwr2rf_16x32_read32(dev, base + RFNCO_FTW_LO0 + 0));
printf ("ftw.lo1=%08x.%08x \n",
libwr2rf_16x32_read32(dev, base + RFNCO_FTW_LO1 + 4),
libwr2rf_16x32_read32(dev, base + RFNCO_FTW_LO1 + 0));
printf ("ftw.slip=%08x \n",
libwr2rf_16x32_read32(dev, base + RFNCO_FTW_SLIP + 0));
printf ("inputs.h=%08x \n",
libwr2rf_16x32_read32(dev, base + RFNCO_INPUTS_H + 0));
printf ("inputs.offsetFSK=%08x.%08x \n",
libwr2rf_16x32_read32(dev, base + RFNCO_INPUTS_OFFSETFSK + 4),
libwr2rf_16x32_read32(dev, base + RFNCO_INPUTS_OFFSETFSK + 0));
libwr2rf_16x32_write32(dev, base + RFNCO_CONTROL,
control | RFNCO_CONTROL_LATCHPHASES);
printf ("phases.h1=%08x.%08x \n",
libwr2rf_16x32_read32(dev, base + RFNCO_PHASES_H1 + 4),
libwr2rf_16x32_read32(dev, base + RFNCO_PHASES_H1 + 0));
printf ("phases.h1main=%08x.%08x \n",
libwr2rf_16x32_read32(dev, base + RFNCO_PHASES_H1MAIN + 4),
libwr2rf_16x32_read32(dev, base + RFNCO_PHASES_H1MAIN + 0));
printf ("phases.if0=%08x.%08x \n",
libwr2rf_16x32_read32(dev, base + RFNCO_PHASES_IF0 + 4),
libwr2rf_16x32_read32(dev, base + RFNCO_PHASES_IF0 + 0));
printf ("phases.if1=%08x.%08x \n",
libwr2rf_16x32_read32(dev, base + RFNCO_PHASES_IF1 + 4),
libwr2rf_16x32_read32(dev, base + RFNCO_PHASES_IF0 + 0));
status = libwr2rf_16x32_read32(dev, base + RFNCO_PRESENTLATCH);
printf ("present_latch=%08x", status);
if (status & RFNCO_PRESENTLATCH_FREV)
printf (" frev");
if (status & RFNCO_PRESENTLATCH_AM)
printf (" am");
if (status & RFNCO_PRESENTLATCH_TW)
printf (" tw");
if (status & RFNCO_PRESENTLATCH_COEF)
printf (" coef");
if (status & RFNCO_PRESENTLATCH_LOAD)
printf (" load");
if (status & RFNCO_PRESENTLATCH_EXTRESET)
printf (" extreset");
if (status) {
libwr2rf_16x32_write32(dev, base + RFNCO_PRESENTLATCH, status);
printf (" [cleared!]");
}
printf("\n");
printf ("Readback struct\n");
printf (" readback.coef=%08x \n",
libwr2rf_16x32_read32(dev, nco_coef_addr+0) );
libwr2rf_16x32_read32(dev, base + RFNCO_READBACK_COEF));
printf (" readback.tw=%08x \n",
libwr2rf_16x32_read32(dev, nco_tw_addr+0) );
libwr2rf_16x32_read32(dev, base + RFNCO_READBACK_TW));
printf (" readback.phaseH1Comp=%08x.%08x \n",
libwr2rf_16x32_read32(dev, nco_phaseH1Comp_addr+4),
libwr2rf_16x32_read32(dev, nco_phaseH1Comp_addr+0) );
printf("ftw_on=%08x.%08x offset_fsk=%08x.%08x ftw_slip=%08x ftw_lo0=%08x.%08x ftw_lo1=%08x.%08x \n",
libwr2rf_16x32_read32(dev, nco_ftw_on_addr+4),
libwr2rf_16x32_read32(dev, nco_ftw_on_addr+0),
libwr2rf_16x32_read32(dev, nco_ftw_offsetfsk_addr+4),
libwr2rf_16x32_read32(dev, nco_ftw_offsetfsk_addr+0),
libwr2rf_16x32_read32(dev, nco_ftw_slip_addr),
libwr2rf_16x32_read32(dev, nco_ftw_lo0_addr+4),
libwr2rf_16x32_read32(dev, nco_ftw_lo0_addr+0),
libwr2rf_16x32_read32(dev, nco_ftw_lo1_addr+4),
libwr2rf_16x32_read32(dev, nco_ftw_lo1_addr+0)
);
libwr2rf_16x32_read32(dev, base + RFNCO_READBACK_PHASEH1COMP + 4),
libwr2rf_16x32_read32(dev, base + RFNCO_READBACK_PHASEH1COMP + 0));
for (int i = 0; i < 512; i = i + 4)
printf ("[%02x]=%08x\n",
i, libwr2rf_16x32_read32(dev, off + i) );
if (flag_dump)
for (int i = 0; i < 512; i = i + 4)
printf ("[%02x]=%08x\n",
i, libwr2rf_16x32_read32(dev, base + i) );
}
static void
......@@ -4559,7 +4588,7 @@ bmctrl (struct libwr2rf_dev *dev, int argc, char **argv)
unsigned flag_once = 0;
unsigned loop;
if (strcmp(argv[1], "1") == 0) {
if (argc > 1 && strcmp(argv[1], "1") == 0) {
flag_once = 1;
argc--;
argv++;
......@@ -4568,11 +4597,25 @@ bmctrl (struct libwr2rf_dev *dev, int argc, char **argv)
/* Choose a ramp program fixed_200, sftpro2, hiradmat, lhcpilot */
if (argc != 2)
goto usage;
if (strcmp(argv[1], "status") == 0) {
if (strcmp(argv[1], "help") == 0)
goto usage;
else if (strcmp(argv[1], "off") == 0) {
bmctrl_ctrl = WR2RF_INIT_REGS_BMCTRL_RFFRAME_CTRL_RESET;
libwr2rf_write16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_BMCTRL_RFFRAME_CTRL, bmctrl_ctrl);
libwr2rf_write16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_BMCTRL_RFFRAME_CTRL, 0);
return;
} else if (strcmp(argv[1], "status") == 0) {
bmctrl_status = libwr2rf_read16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_BMCTRL_RFFRAME_STATUS);
printf ("bmctrl status: %04x\n", bmctrl_status);
bmctrl_ctrl = libwr2rf_read16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_BMCTRL_RFFRAME_CTRL);
printf ("bmctrl control: %04x\n", bmctrl_ctrl);
printf ("bmctrl control: %04x", bmctrl_ctrl);
if (bmctrl_ctrl & WR2RF_INIT_REGS_BMCTRL_RFFRAME_CTRL_RESET)
printf (" reset");
if (bmctrl_ctrl & WR2RF_INIT_REGS_BMCTRL_RFFRAME_CTRL_EN)
printf (" en");
if (bmctrl_status & WR2RF_INIT_REGS_BMCTRL_RFFRAME_CTRL_UPDATE)
printf (" update");
printf("\n");
return;
} else if (strcmp(argv[1], "reset") == 0) {
ramp = 0;
......@@ -4596,16 +4639,19 @@ bmctrl (struct libwr2rf_dev *dev, int argc, char **argv)
ramp = 6;
rampsize = 100000;
} else {
goto usage;
printf ("Unrecognised cycle mode\n");
return;
}
// Use an internal register source for FTWs rather than the WR network
libwr2rf_write16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_NCO_LOC_OR_WRS,
WR2RF_INIT_REGS_NCO_LOC_OR_WRS_PARAMS_SEL);
/* Note that the NCO must be configured for external data (use nco_wrcfg)
*/
// init the beam control fifo + registers
bmctrl_ctrl = WR2RF_INIT_REGS_BMCTRL_RFFRAME_CTRL_RESET;
sleep(0.1);
libwr2rf_write16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_BMCTRL_RFFRAME_CTRL, bmctrl_ctrl);
libwr2rf_write16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_BMCTRL_RFFRAME_CTRL, 0);
bmctrl_ctrl = WR2RF_INIT_REGS_BMCTRL_RFFRAME_CTRL_EN;
......@@ -4723,8 +4769,10 @@ bmctrl (struct libwr2rf_dev *dev, int argc, char **argv)
return;
usage:
printf ("Unrecognised cycle mode. Available modes are: \n");
printf ("usage: %s status|off|MODE\n", argv[0]);
printf ("Available modes are:\n");
printf (" reset, fixed_200, ramp_man, lhcpilot, sftpro2, fast_sftpro2, two_tone\n");
printf ("To improve reliability, use: nco_lcfg, bmctrl reset, bmctrl MODE\n");
}
static void cmd_help (struct libwr2rf_dev *dev, int argc, char **argv);
......
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