Commit 558b18f4 authored by Alessandro Rubini's avatar Alessandro Rubini

Merge branch 'v3.3-dev'

parents 89322f34 620e5880
......@@ -19,8 +19,8 @@ linux-2.6.39.tar.bz2 1aab7a741abe08d42e8eccf20de61e05 \
http://www.kernel.org/pub/linux/kernel/v2.6/linux-2.6.39.tar.bz2
# our gateware binaries
wrs3-gw-v3.0-20120801.tar.gz 28a7ac3ec004d3e441c232fa125d820a \
http://www.ohwr.org/attachments/download/1485/wrs3-gw-v3.0-20120801.tar.gz
wrs3-gw-v3.3-20130213.tar.gz f7cd4323aa4de317d3fa8a0fd8c82479 \
http://www.ohwr.org/attachments/download/1909/wrs3-gw-v3.3-20130213.tar.gz
# buildroot core and packages
buildroot-2011.11.tar.bz2 7b852f4ef17c63857ca7b9388b782070 \
......
......@@ -25,6 +25,7 @@ showhelp()
printf "Options: \n"
printf " -h|--help\t Show this help message\n"
printf " -m|--mode\t can be: default (df and nf), df (dataflash),\n\t\t nf (nandflash), ddr (ddr memories).\n"
printf " -g|--gateware\t Select the gateware: 18p (18 ports, default), 8p (8 ports), LX130T (small FPGA), LX240T (big FGPA)\n"
printf " -e \t\t Completely erase the memory (Can erase your configuration)\n"
printf " -b|--build\t Use files that you have built in the WRS_OUTPUT_DIR\n"
printf " -m1|--mac1\t Default MAC address for the ethernet port on board\n"
......@@ -107,6 +108,10 @@ MAC1=$MAC1_DEF
MAC2_DEF="02:34:56:78:9A:00"
MAC2=$MAC2_DEF
# By default we select the gateware only for 18ports because 8ports are
# only used by developper.
gateware="18p*.bin"
DEV=""
FLAGS=""
......@@ -156,6 +161,19 @@ while [ $# -ge 1 ]; do
fi
memmode="$2"
shift; shift;;
-g|--gateware)
# Obtain which gateware type we want to keep for flash
if [ "$2" = "18p" ] || [ "$2" = "8p" ]; then
gateware="$2*.bin";
elif [ "$2" = "LX240T" ] || [ "$2" = "LX130T" ]; then
gateware="*-$2.bin";
else
echo "Error: Invalid gateware selection \"$2\""
showhelp
exit 1
fi
shift; shift;;
/* ) DEV="-s $1"; shift ;;
......@@ -224,9 +242,9 @@ if lsusb | grep -q "at91sam"; then
else
echo ""
echo "$me: Waiting for at91sam SAMBA bootloader on usb."
echo " Please check the jumper is plugged"
echo " and the USB cable is connected."
echo " Then reset the switch or turn it on."
echo " Please check the Managment USB cable is connected "
echo " and keep pressed the Flash button while"
echo " resetting/powering the switch."
while true; do
if lsusb | grep -q "at91sam"; then
break
......@@ -239,7 +257,7 @@ fi
# Remove the jumper now, before proceeding
echo "$me: I'm talking with the switch;"
echo -n " please remove the jumper and press Enter to start flashing: "
echo -n " please release the flash button and press Enter to start flashing: "
read unused
# Create a temporary barebox binary with modified MAC addresses
......@@ -269,6 +287,9 @@ if [ $nf ]; then
TMPSCRIPT=$TMPDIR/wrsrootfs-script
cat > $TMPSCRIPT << EOF
tar --directory $TMPFS -xzf $rootfsgz
# Remove the unnecessary HDL files, by default we keep 18 ports HDL for both FPGA type
# (There is not enough place in DDR to extract 4 HDLs, be carefull if you add custom files)
find $TMPFS/wr/lib/firmware/ -type f \( ! -name ''${gateware}'' \) -a \( ! -name '*rt_cpu.bin' \) -exec rm -f {} \;
mkfs.jffs2 --little-endian --eraseblock=0x20000 -n --pad -d $TMPFS -o $rootfsjffs2
......
......@@ -21,11 +21,13 @@ else
fi
if [ "$WRS_HW_DIR" != "" ]; then
wrs_echo "Copying binaries from $WRS_HW_DIR"
cp ${WRS_HW_DIR}/syn/scb_8ports/scb_top_synthesis.bin $FWDIR/8ports_mb.bin
cp ${WRS_HW_DIR}/syn/scb_18ports/scb_top_synthesis.bin $FWDIR/18ports_mb.bin
wrs_echo "Copying binaries from $WRS_HW_DIR"
cp ${WRS_HW_DIR}/syn/scb_8ports/scb_top_synthesis.bin $FWDIR/8p_mb-LX130T.bin
cp ${WRS_HW_DIR}/syn/scb_18ports/scb_top_synthesis.bin $FWDIR/18p_mb-LX130T.bin
# cp ${WRS_HW_DIR}/syn/scb_8ports/scb_top_synthesis.bin $FWDIR/8p_mb-LX240T.bin
# cp ${WRS_HW_DIR}/syn/scb_18ports/scb_top_synthesis.bin $FWDIR/18p_mb-LX240T.bin
else
tarname="wrs3-gw-v3.0-20120801.tar.gz"
tarname="wrs3-gw-v3.3-20130213.tar.gz"
wrs_echo "Using pre-build binaries from $tarname"
wrs_download $tarname
tar xzf $WRS_DOWNLOAD_DIR/$tarname -C $FWDIR
......
~
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tex/
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## GNU Lesser General Public License Usage
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% WRS-3/18 - User Guide
% Benoit Rat, Rodrigo Agis (Seven Solutions)
### Copyright
This document is copyrighted (under the Berne Convention) by Seven
Solutions company and is formally licensed to the public under **GPL v2.0** license.
Report content can be copied, modified, and redistributed.
The Seven Solutions Logo can not be modified in any form, or by any means without prior
written permission by Seven Solutions.
### Licenses
~~~~~~~
The "User Guide" (as defined above) is provided under the terms of GPL v2.0
Copyright (C) 2013 - Seven Solutions
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License
as published by the Free Software Foundation; either version 2
of the License, or (at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
~~~~~~~~~
The [WRS] has been released under the **CERN OHL** licence.
~~~~~~~
Copyright CERN 2011.
This documentation describes Open Hardware and is licensed under the CERN OHL v. 1.1.
You may redistribute and modify this documentation under the terms of the
CERN OHL v.1.1. (http://ohwr.org/cernohl). This documentation is distributed
WITHOUT ANY EXPRESS OR IMPLIED WARRANTY, INCLUDING OF
MERCHANTABILITY, SATISFACTORY QUALITY AND FITNESS FOR A
PARTICULAR PURPOSE. Please see the CERN OHL v.1.1 for applicable
conditions
~~~~~~~~~~~~~~~~~
\clearpage
### Revision table
------------------------------------------------------------------------
Rev Date Author Comments
----- ----------- ------------------- --------------------------------
0.1 18/02/2013 Benoit Rat\ Initial Version\
[Seven Solutions] Reviewer: Rodrigo Agis ([7S])
0.2 26/03/2013 Benoit Rat\ Adding suggestion from\
[Seven Solutions] Beck, Dietrich Dr (GSI)
0.3 27/03/2013 Benoit Rat\ Modifying licence to GPL v2.0\
[Seven Solutions] to be comptabile with the package
------------------------------------------------------------------------
\clearpage
Introduction
=================
The White Rabbit Switch ([WRS]) is the key component of the
White Rabbit Protocol that provides precision timing and high synchronization over an Ethernet-based network.
About this Guide
-----------------
This document is intended as a user guide for quickly setup your switch in
a White Rabbit Network. For more details on advanced topics please
refers to the [Advanced configuration section](#advanced-configuration) or
to the [wr-switch-sw.pdf] guide.
Product Overview
==================
Package
------------
The [WRS] package is composed of various elements:
* The packaging box
* A power cable according to the country of distribution.
* The 18 SFP ports switch.
* SFP LC connectors[^1]
* 16x AXGE-3454-0531 (violet)
* 2x AXGE-1254-0531 (blue)
[^1]: The SFP LC connectors are optional. Consult the [SFPs Wiki] for more information about the compatibility of SFPs and how to use them.
Front panel (Legend)
---------------------
![Front Panel of the WRS](front_panel.png)
1. The 18 SFP ports
#. Synced/Activity LEDs
#. Link/WR Mode LEDs
#. Management Mini-USB (B) port
#. Status LED
#. Power LED
#. PPS output
#. Synced 125MHz Output
#. PPS input (GPS Clock)
#. 10MHz reference clock input (GPS/Cesium)
#. 125MHz reference clock input (GPS/Cesium)
#. Ethernet 100Mbps Management Port
Back panel (Legend)
--------------------
![Back Panel of the WRS](back_panel.png)
13. Ground Connector
#. Generic Button
#. Flashing Button ([See firmware update](#firmware-update))
#. RS232 Management Port (GPRMC)
#. FPGA Mini-USB (B) UART
#. ARM Mini-USB (B) UART
#. Power Switch
#. Power Plug
#. Serial Number and MACs
Basics
==================
Default Setting
----------------
The device is factory configured with the following default settings:
* IP configuration is **DHCP**
* MACs are given by the manufacturer; labeled on back panel [#21](#back-panel-legend)
* MAC1 corresponds to the managment port (RJ45).
* MAC2 corresponds to the first SFP port ($wr[0-17] \Leftrightarrow \textrm{MAC2}+[0-17]$).
* WR mode is **BoundaryClock** (Simple Master)
* The first two ports (SFPs 1 & 2) are configured as WR slave.
* The other ports (SFPs [3-18]) are configured as WR master.
* SSH user: **root**
* SSH password: (empty/just press enter)
* Boot method: from Nandflash firmware
Quick Startup
--------------
To get the switch quickly working we recommend you to:
1. Plug an Ethernet cable to the *Ethernet 100Mpbs Management Port*.
#. Plug the power cable to the *Power Plug*.
After all connections have been made, toggle the power-switch on to turn
the device on. After the power on, the [WRS] should behave as follows:
4. The *Power LED* goes green
#. After 15s, the *Status LED* goes orange which means that the [WRS]'s kernel
has started.
#. Finally, it goes green and the FANs start working.
You have now the [WRS] ready to be used in a WR network.
7. Connect the blue SFPs (AXGE-1254-0531) to the SFP port 1 and 2 of the
[WRS]. These SFPs are the ones that will receive synchronization message
from another master [WRS] or from the grandmaster [WRS]. If you only have
one switch in your network you might configure it in the
[GrandMaster mode](#grandmaster-mode).
#. You can plug the other SFP ports [2-16] with violet SFPs (AXGE-3454-0531)
to the WR node such as [SPEC], [SVEC], ...
USB Connections
----------------
The [WRS] has three different USB ports used to communicate/monitorize
through a PC.
a. Management Mini-USB (B) port
b. FPGA Mini-USB (B) UART
c. ARM Mini-USB (B) UART
These ports correspond themselve to different devices on your computer.
a. ttyACM0 (when the *Status LED* is green)
b. ttyUSB0
c. ttyUSB1
To connect to them you need to open a serial console such as minicom[^minicom]
~~~~~{.bash}
## Connecting to the ARM UART
minicom -D /dev/ttyUSB1 -b 115200
## Connecting to the FPGA UART
minicom -D /dev/ttyUSB0 -b 115200
## Connecting to the Management USB port
minicom -D /dev/ttyACM0 -b 115200
~~~~~~~~~~~~
[^minicom]: In debian's like distribution you can install minicom by executing
`sudo apt-get install minicom` command.
Login Via USB
--------------
Once the device has been correctly started up (*Status LED* is green),
It is recommended to use the USB management port to connect to the device
instead of the ARM UART.
~~~~~{.bash}
## Connecting to the Management USB port
minicom -D /dev/ttyACM0 -b 115200
~~~~~~~~~~
The ARM UART is usually employed during development and monitoring because
the kernel and daemons messages are thrown to this console.
Login via SSH
--------------
The Ethernet management port automatically obtains its IP using the DHCP
protocol. If you don't have any DHCP router/server in your network please
refer to the [non-DHCP](#non-dhcp-user) section.
To obtain the IP of the [WRS] you can connect to your DHCP server interface
and retrieve the IP, or [connect via USB](#login-via-usb) to retrieve the
IP (`ipconfig eth0`).
If the [WRS] IP is for example `192.168.1.50` you might connect using:
ssh root@192.168.1.50
And press enter when requesting the password.
Login using Windows
-----------------------
The process of login to the switch using Windows (XP,Vista,7,8) is pretty
similar:
1. You first need to download the [Putty Tool] and install it.
2. Then you need to list and find out which serial port in Windows corresponds
to which interface. A simple way to perform this is to plug only one USB
cable at a time, and go to
`Device Manager > Ports (COM & LPT)` to check
the name of the `COM<X>` port.
3. Finally to connect through the USB you just need to open the Putty
tool and configure it as indicated in the figure below. Do not forget to replace the
`COM9` port name by the one that corresponds to the USB management.
![Putty - USB connection](putty-ACM0.png)
4. Similarly, you can connect to the [WRS] using the SSH protocol.
You should not forget to replace the IP of your [WRS] (yellow)
by the one in your subnetwork.
![Putty - SSH connection](putty-SSH.png)
After login:
-------------------
Once you are login you can use various tools to monitorize the [WRS].
All these tools are found in `/wr/bin/` which is included in the `$PATH`.
The following list resumed the most interesting one:
* `shw_ver`: Print informations about the SW & HW version of the [WRS].
* `rtu_stat`: Routing Table Unit Statistic, returns the routing table information where we can find which MAC need to be forward to which port. It also allows to add and delete entries.
* `wr_mon`: WR Switch Sync Monitor, outputs informations about the state of WR syncrhonisation such as Phase Tracking, Master-Slave delay, link asymmetry, etc...
* `spll_dbg_proxy`: SoftPLL debug proxy, reads out the debug FIFO datastream from the SoftPLL and proxies it via TCP connection to the application running on an outside host, where it can be plotted, analyzed, etc.
> Notes: More information about each tools can be obtain using the embedded help argument: `--help`, `-h` or `help`.
#### Warning:
The SFP ports are labeled from 1 to 18 on the front panel but their corresponding
network interface are named from `wr0` to `wr17`, remind it.
Configurations
==================
Booting
------------
After 10 seconds, the bootloader automatically loads the [WRS] firmware
from the Flash NAND memory of the switch. If you connect to the ARM debug
port you might see the following message:
~~~~~{.bash}
Welcome on WRSv3 Boot Sequence
1: boot from nand (default)
2: boot from TFTP script
3: edit config
4: exit to shell
5: reboot
~~~~~~~~~~~~~~~~~~~
> Notes: If you want to change how
the [WRS] is booted you can place a `wrboot` script in your TFTP root
folder and select the second option or you can edit the configuration
(third option). Please find more explanations in the
[Advanced configuration](#advanced-configuration)
Non-DHCP user
---------------
If you have no DHCP server in your network you must connect to the [WRS]
using the [login via USB method](#login-via-usb) and then edit the
`interfaces` file:
~~~~{.bash}
vi /etc/network/interfaces
~~~~~~~~~~~
for example, in a `192.168.1.x` subnetwork you might replace the
`iface eth0 inet dhcp` by
~~~~~{.bash}
iface eth0 inet static
address 192.168.1.10
netmask 255.255.255.0
network 192.168.1.0
broadcast 192.168.1.255
gateway 192.168.1.1
~~~~~~~~~~~~~~
> Notes: If you are willing to use TFTP script in a non-DHCP network, you
must also statically set the IP in the bootloader configuration.
GrandMaster mode
-----------------
![White Rabbit Network](wr_network2.jpg)
In a White Rabbit network, almost all the switches are configured as "Simple Master"
(default configuration). They transmit the clock signal that cames from other switches.
However the "top" switch connected to the GPS signal is called the **Grand Master**
and is configured in a specific way.
To configure a switch in GrandMaster mode you must edit[^viedit] the `wrsw_hal.conf` file
~~~~{.C}
vi /wr/etc/wrsw_hal.conf
~~~~~~~~
And uncommenting the timing.mode value the line below:
~~~~{.Haskell}
timing = {
-- other values
mode = "GrandMaster"; -- grand-master with external reference
};
~~~~~~
For a more detailed explanation on how to configure and connect the switch in grand master mode, please consult the
[wr_external_reference.pdf] document.
[^viedit]: To edit in `vi`: `Ins` Insert text; `Esc` back to normal mode; `:wq` Save and Exit
Firmware updates
------------------
This section proposes a simple way to update the firmware of the [WRS]
by flashing the memory using the *Management Mini-USB*[^flashlinux].
1. Download the [flashing package] and extract it.
#. Download the [latest stable release] of the [WRS]
binaries in a tar.gz package.
#. Connect the *Management Mini-USB* port to the PC.
#. Start the flashing procedure by doing:
~~~~{.bash}
flash-wrs -e -m1 <MAC1> -m2 <MAC2> wr-switch-sw-<latest_version>.tar.gz
~~~~~~~~~~~~
where MAC1 and MAC2 are written in the pack panel (*Serial Number and MACs*)
4. At this step you will be asked to restart the [WRS], using the *Power
Switch*, while pressing the *Flash Button*.
#. The flashing procedure should start and it takes some time to perform.
#. The switch will restart by itself which means that the flashing operation
as performed successfully.
[^flashlinux]: The flashing operation is only available for linux environment, and
it is recommended to use debian's like distribution such as "Ubuntu"
Advanced configuration
-----------------------
For more complex topics about the [WRS] you must look at the [wr-switch-sw.pdf]
written for advanced user and developer. You will find informations about:
* Advanced flashing options.
* Configuring specific MAC address.
* Modification of the bootloader.
* Changing Slave/Master port type.
* Building from the sources.
* etc.
Safety Notes
=============
#### Warning:
Do not block the air vents which are located on back panel of the [WRS],
the internal temperature might increase and damage the switch.
#### Warning:
To increase the lifetime of the [WRS] it is recommended to use the switch
in a controlled ambient environment and limit to the ambient condition
stated in the [Specification Appendix](#specification).
#### Warning:
The standard power source for this equipment is designed to work in the
range of 110-240V with 50-60Hz.
#### Warning:
This equipment is intended to be grounded using the *Grounded Connector*.
Ensure that the host is connected to earth ground during normal use.
#### Warning:
To prevent bodily injury when mounting or servicing this unit in a rack, you must
take special precautions to ensure that the system remains stable.
This unit should be mounted at the bottom of the rack if it is the only unit in the
rack.
When mounting this unit in a partially filled rack, load the rack from the bottom
to the top with the heaviest component at the bottom of the rack.
Appendix
============
Specification
----------------
+--------------------+-------------------------------------------------+
| ***FPGA*** | |
+====================+=================================================+
| **Type** | Xilinx Virtex-6 (LX240T) |
+--------------------+-------------------------------------------------+
| **Package** | 1156-pin BGA |
+--------------------+-------------------------------------------------+
| **Slices** | 37,680 (4 LUTs and 8 flip-flops) |
+--------------------+-------------------------------------------------+
| **Memories** | 416x36Kb (9,504Kb) Block RAM\ |
| | 32MB NOR Flash |
+--------------------+-------------------------------------------------+
| **Softcore** | LatticeMico32 (LM32) |
+--------------------+-------------------------------------------------+
| **I/O** | 20 GTX transceivers for SFP links\ |
| | 40 GPIO for generic purpose |
| | (LEDs, SFP detection, ...) |
+--------------------+-------------------------------------------------+
| **Monitoring** | Monitoring power supply |
+--------------------+-------------------------------------------------+
| **Temperature** | Sensor control |
+--------------------+-------------------------------------------------+
+--------------------+-------------------------------------------------+
| ***CPU*** | |
+====================+=================================================+
| **Type** | ARM Atmel AT91 SAM9G45 |
+--------------------+-------------------------------------------------+
| **Core** | 400MHz (ARM926E) |
+--------------------+-------------------------------------------------+
| **Memories** | 64MB DDR2 (16-bit bus chip)\ |
| | 256MB NAND flash chip\ |
| | 8MB boot flash |
+--------------------+-------------------------------------------------+
| **I/O** | 32bit Async Bridge with FPGA\ |
| | 100Base-T Ethernet |
+--------------------+-------------------------------------------------+
| **OS** | Linux (Kernel v2.6.39) |
+--------------------+-------------------------------------------------+
+--------------------+-------------------------------------------------+
| ***OnChip Clock*** | |
+====================+=================================================+
| **PLL** | AD9516 (14-Output Clock Generator |
| | with Integrated 1.6 GHz VCO) |
+--------------------+-------------------------------------------------+
| **Synthesizer** | TI CDCM61002RHBT (28-683MHz) |
+--------------------+-------------------------------------------------+
| **DAC** | 2xAD5662BRJ (16bit; 2.7-5.54V) |
+--------------------+-------------------------------------------------+
+--------------------+-------------------------------------------------+
| ***Others*** | |
+====================+=================================================+
| **Soldering** | IPC- 610 Rev E Class 2 |
+--------------------+-------------------------------------------------+
| **Certification** | ISO-9001, ISO-14001, CE, RoHS |
+--------------------+-------------------------------------------------+
| **Power Supply** | 100-240VAC, 2.0A 50-60 Hz\ |
| | 12V DC, 6.66A – 80W max |
+--------------------+-------------------------------------------------+
| **Environmental** | Temperature: -10ºC ~ +50ºC\ |
| **Conditions** | Humidity: 0% ~ 90% RH |
+--------------------+-------------------------------------------------+
Features
----------
* PTPv2 (IEEE 1588-2008)
* WRP daemon (node discovery, etc.)
* DHCP client
* SSH server
* Python Support
* NTP Client/Relay/Server
* ARP/ DNS / EtherWake protocol
Warranty
-------------
The [WRS] is fully factory tested and warranted against manufacturing defects for a period of one year. As the
circumstances under which this [WRS] is installed can not be controlled, failure of the [WRS] due to
installation problems can not be warranted. This includes misuse, miswiring, overheating, operation under loads beyond the
design range of the [WRS].
For warranty or non-warranty replacement send the [WRS] to:
> Seven Solutions\
C/ Baza, parcela 19, nave 3 \
Polígono Industrial Juncaril, \
18210 Peligros \
(Granada), SPAIN.
FAQs & Troubleshooting
--------------------------
If you are experiencing some issues please look first at the [FAQ] wiki
page if you can find an answer.
You can also reach out the wiki to see if your issue is a known
bug and if a solution was found:
<http://www.ohwr.org/projects/wr-switch-sw/wiki/Bugs>
You can also request Technical Support by
[contacting our company](#contact-us)
### Bug report
Feel free to send us a bug report with the full state of the [WRS] by
executing the following command:
~~~~~{.bash}
#On the WRS
shw_ver > /tmp/bug_report.txt
rtu_stat >> /tmp/bug_report.txt
dmesg >> /tmp/bug_report.txt
#Obtain the IP of the switch
ifconfig eth0 | grep addr
~~~~~~~~~~~~
And retrieving the file from your computer by using SSH:
~~~~~{.bash}
#On your client
scp root@<IP_of_the_switch>:/tmp/bug_report.txt ~
~~~~~~~~~~~~~~
Contact-Us
-----------
To contact Seven Solutions company please use:
* <info@sevensols.com>
* (+34) 958 285 024
* <http://www.sevensols.com>
Save Our Environment
---------------------
![Trash](trash.jpg)\
This symbol means that when the equipment has
reached the end of its life cycle, it must be taken
to a recycling centre and processed separate from
domestic waste.
The cardboard box, the plastic contained in the packaging,
and the parts that make up this device can be recycled in
accordance with regionally established regulations.
Never throw this electronic equipment out along with
your household waste. You may be subject to penalties or
sanctions under the law. Instead, ask for instructions from
your municipal government on how to correctly dispose of it.
Please be responsible and protect our environment.
Glossary
===========
DHCP
: The Dynamic Host Configuration Protocol to obtain network configuration
PTP
: Precise Time Protocol, a time synchronization protocol
NAND
: NAND Flash Memory, a type of reprogrammable non-volatile computer memory
FMC
: FPGA Mezzanine Card, an ANSI standard for mezzanine card form factor.
SMC
: SubMiniature version C, coaxial connector used in radio-frequency circuits.
SFP
: Small form-factor pluggable transceiver, a hot-pluggable transceiver for optical fiber
PCIe
: Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard
LM32
: LatticeMico32 is a 32-bit microprocessor soft core optimized for field-programmable gate arrays (FPGAs).
HDL
: Hardware description language
SPEC
: Simple PCIe FMC carrier
SVEC
: Simple VME FMC carrier
UART
: Universal Asynchronous Receiver/Transmitter
WR
: White Rabbit
WRS
: White Rabbit Switch
References
==============
* [wrs-3/18.pdf] Datasheet for the White Rabbit Switch v3 - 18 SFPs
* [wr-switch-sw.pdf] Advanced documentation on how using the software
* [wr_external_reference.pdf] Connect the [WRS] in GrandMaster mode.
* [whiterabbitsolution] White Rabbit as a complete timing solutions
* [WRS Wiki]: White Rabbit Switch Wiki on ohwr.org
* WRS [FAQ]: WR-Switch Frequently Added Questions
* [wr-switch-testing] Project for testing the switch itself
* [SFPs Wiki] Type of SFP supported by the [WRS]
<!-- List of links -->
[whiterabbitsolution]: http://www.sevensols.com/whiterabbitsolution/
[WRS]: http://www.sevensols.com/index.php?seccion=1410&subseccion=1435
[WR Wiki]: http://www.ohwr.org/projects/white-rabbit/wiki
[WRS Wiki]: http://www.ohwr.org/projects/white-rabbit/wiki/Switch
[wr-switch-sw]: http://www.ohwr.org/projects/wr-switch-sw/
[wr-switch-hdl]: http://www.ohwr.org/projects/wr-switch-sw/
[wr-switch-hw]: http://www.ohwr.org/projects/wr-switch-hw/
[wr-switch-testing]: http://www.ohwr.org/projects/wr-switch-testing
[wr-starting-kit]: http://www.ohwr.org/projects/wr-starting-kit/
[SPEC]: http://www.ohwr.org/projects/spec/
[SVEC]: http://www.ohwr.org/projects/svec/
[SFPs Wiki]: http://www.ohwr.org/projects/white-rabbit/wiki/SFP
[Seven Solutions]: http://www.sevensols.com
[7S]: http://www.sevensols.com
[Putty Tool]: http://www.putty.org/
[FAQ]: http://www.ohwr.org/projects/white-rabbit/wiki/FAQswitch
[wr-switch-sw.pdf]: http://www.sevensols.com/dl/wr-switch-sw/latest_stable.pdf
[wr_external_reference.pdf]: http://www.ohwr.org/attachments/1647/wr_external_reference.pdf
[wrs-3/18.pdf]: http://www.sevensols.com/whiterabbitsolution/files/7SP-WRS-3_18.pdf
[latest stable release]: http://www.sevensols.com/dl/wr-switch-sw/bin/latest_stable.tar.gz
[flashing package]: http://www.sevensols.com/dl/wrs-flashing/latest_stable.tar.gz
......@@ -60,9 +60,9 @@ This document describes the software build procedures for the White
Rabbit Switch. The procedure described is for version 3 of the
hardware project, which has been successfully booted for the first
time on Sep 13th 2011.
The different steps focus on the v3.2, however you can find some
The different steps focus on the v3.3, however you can find some
(though limited)
documentation for v3.0 & v3.1 in @ref{Older Hardware Releases}
documentation for v3.0, v3.1 & v3.2 in @ref{Older Hardware Releases}
@b{Note:} the switch, as shipped, works perfectly with the provided
binaries (@url{http://www.ohwr.org/projects/wr-switch-sw/files}), and
......@@ -70,6 +70,10 @@ most users will only need to run the flasher -- see @ref{Flashing of
WRS-3}. This document as a whole is mainly aimed at developers who
want to customize their own switch, which is actually a GNU/Linux host.
If you do not need to modify/hack anything in the switch and just learn
how to use it, you should first refer at the @b{User Guide} that you can
find in the @url{http://www.ohwr.org/projects/wr-switch-sw/files}
If you have an older Version-2 switch, please refer to the v2 branch
of the repository at
@code{git://ohwr.org/white-rabbit/wr-switch-sw.git}
......@@ -387,7 +391,7 @@ in this chapter. You might also want to check its embedded documentation using:
@node Release Package
@subsection Release Package
Once all the building steps have succeed, you can easily create a
Once all the building steps have succeeded, you can easily create a
package in @code{WRS_OUTPUT_DIR} using the following command:
@example
......@@ -433,6 +437,13 @@ You can list all compiled module by calling
/path/to/wr-switch-sw/build/wrs_build-all --list
@end example
If you want to rebuild various modules at the same time, you should run
something similar as:
@example
/path/to/wr-switch-sw/build/wrs_build-all --step="5 7 9"
@end example
As an alternative, you can run the individual script from within
@i{scripts/}, after setting the proper environment variables.
......@@ -457,7 +468,7 @@ directory by deleting all compiled modules (except downloaded files), just call:
This chapter describes the different steps to install the WRS-3 with the
correct firmware. This procedure describes the installation of the switch
with a @i{SCB v3.2} and a @i{Mini-Backplane v3.2}. If you have an older
with a @i{SCB v3.3} and a @i{Mini-Backplane v3.3}. If you have an older
version you might look at the @ref{Older Hardware Releases} and the footnotes.
@menu
......@@ -470,32 +481,39 @@ version you might look at the @ref{Older Hardware Releases} and the footnotes.
@section USB connections
In order to perform the flashing operation easily, you should connect
two @i{mini-USB} cables to the two front panel sockets. One is used
to communicate with the intarnal ROM of the CPU, the other is a serial
port used to interact with the various applications and FPGA. One
of the GPIO pins of the CPU is connected to a switch, so that the
same serial port can be used for either device (CPU and FPGA) in
different times.
three @i{mini-USB} cables to the switches.
@sp 1
@center @image{frontpanel, 7cm,,front panel of the switch}
@sp 1
The two back panel @i{mini-USB} sockets correspond to the serial
port of the FPGA and the ARM. They are labeled @b{FPGA test} and
@b{ARM test} and respectively correspond to the devices
@code{/dev/ttyUSB0} and @code{/dev/ttyUSB1} on your host.
The diagnostic serial port is the
@b{right} mini-USB @i{(Test)} port of the switch. This is the debug UART
of the ARM (default at boot time) and can later be switched to the FPGA.
Once connected
@code{/dev/ttyUSB0} should appears on your machine, and you can connect
using minicom @footnote{You can use other programs for accessing serial ports, for example @uref{http://brokestream.com/tinyserial.html, tinyserial}} like this:
You can connect to them using minicom
@footnote{You can use other programs for accessing serial ports, for
example @uref{http://brokestream.com/tinyserial.html, tinyserial}}
like this:
@example
minicom -D /dev/ttyUSB0 -b 115200
minicom -D /dev/ttyUSB1 -b 115200
@end example
Unfortunately, the preferred way to communicate with the CPU internal ROM
is through the other USB port, using the @b{left} mini-USB port of the switch.
When the ROM is unable to boot user code from its SPI flash memory, it
accepts to be enumerated by the host. You can see the enumerated
Unfortunately, this order depends on how the USB cables are plugged
so you might have the @code{ttyUSB0} device that corresponds to the ARM
and the @code{ttyUSB1} to the FPGA.
@sp 1
The front panel USB connection, labeled as @b{managment} USB port, communicates
with the internal ROM of the CPU. It is the one used to perform the
flashing procedure.
You first need to set up the switch in @emph{"Flashing mode"} to
continue with the flashing procedure. To do so, you should turn on
the power while pressing the @b{flash button} on the rear panel.
If the operation succeed you should see the message @code{bootROM}
appears on the ARM UART. You can also see the enumerated
device in your own host:
@smallexample
......@@ -503,28 +521,21 @@ device in your own host:
Bus 001 Device 025: ID 03eb:6124 Atmel Corp. at91sam SAMBA bootloader
@end smallexample
The kernel should automatically load the proper device driver, and you
Finally, the kernel should also load the proper device driver, and you
are expected to see @code{/dev/ttyACM0} or equivalent in your system.
If the device is not enumerated,
this mean that there is already some code in the
@i{dataflash}, which the switch tries to boot. In order to disable the
dataflash you need to open the switch box and fit a 1mm jumper
@footnote{On v3.0 & v3.1 this jumper does not exist. Refer to
@ref{Flashing v3.1/v3.0}}
on the @i{DFEN} pin as shown in picture below. Most of the switches are
shipped with a jumper already plugged between two GND pins. If your switch
has a jumper plugged, you can use it to disable the @i{dataflash}.
a jumper in the switch,
If it is not the case, this mean that the buton used to disable the dataflash
during the boot so that the CPU ROM do not find any valid code and enter in
@emph{"Flashing mode"} is not working. You can open your box and follow
the instruction explained @ref{Flashing v3.2} or contact support.
Please note that this procedure is not available with the previous
version. Refer to your corresponding flashing section in @ref{Older
Hardware Releases}.
@sp 1
@center @image{jumpers, 10cm,,Booting jumpers}
@sp 2
With the jumper in place, you should reset the machine pressing
the button near the 20-pin JTAG connector. When you see that the
USB device has been enumerated, you should remove the jumper so the
programming procedure can access the @i{dataflash} device.
@c =============================================================================
@node Flashing Procedure
......@@ -599,11 +610,11 @@ bus, it prints a message and waits for the switch to be turned on
in the proper way (with the humber plugged).
The process calls the flasher program twice (so you'll see the
initialization strings two times) an takes slightly less than 3
initialization strings two times) and takes slightly less than 3
minutes. the longest step is erasure of @i{DataFlash}: if run
without @t{-e} the script takes just 20 seconds.
This is the a summary of the output you are expected to see,
This is the summary of the output you are expected to see,
trimmed to save pages:
@smallexample
......@@ -653,7 +664,7 @@ DDR: Writing 21119306 bytes at offset 0x0 buffer 70000000....ABCDEF
@end smallexample
It is suggested to look at the CPU's serial port during programming,
where you you will see messages like these:
where you will see messages like these:
@smallexample
-I- Statup: PMC_MCKR 1202 MCK = 100000000 command = 0
......@@ -711,10 +722,12 @@ Options:
-h|--help Show this help message
-m|--mode can be: default (df and nf), df (dataflash),
nf (nandflash), ddr (ddr memories).
-g|--gateware Select the gateware: 18p (18 ports, default), 8p (8 ports), LX130T (small FPGA), LX240T (big FGPA)
-e Completely erase the memory (Can erase your configuration)
-b|--build Use files that you have built in the WRS_OUTPUT_DIR
-m1|--mac1 Default MAC address for the ethernet port on board
-m2|--mac2 Default base MAC address for the switch ports
@end smallexample
The @i{DEV} is optional and the default is @code{/dev/ttyACM0}.
......@@ -741,6 +754,17 @@ install different binaries on these memories:
@item nandflash: @emph{kernel} zImage and the @emph{file-system}
@end itemize
You can select which type of gateware you want to flash on your
switch. By default we only write on the nandflash the gateware
for 18 ports for both its light (@code{LX130T}) and full
(@code{LX240T}) FPGA size. If you know which type of FPGA you are
using (i.e, @code{LX240T}) and you want to have the gateware for 8
and 18 ports you can use the flag as below:
@smallexample
$ ./build/flash-wrs --gateware LX240T <...>
@end smallexample
You can also erase the dataflash memory before writing your binaries; to do this
add the option @code{-e}. Note that the script always erases nandflash before
writing to it.
......@@ -1197,6 +1221,9 @@ The most important tools in @file{userspace/tools} are the following:
A simple monitor of White Rabbit status. It prints to @i{stdout}
using the standard escape sequences.
@item shw_ver
Print informations about the SW & HW version of the WRS.
See also @ref{DIP Switch HW version}.
@end table
Please note that to compile the applications and tools outside of the build
......@@ -1362,15 +1389,46 @@ it by using magic offsets in the commands).
@node Schematics are Available
@appendix Schematics are Available
The switch schematics for all PCB versions (3.0, 3.1 and 3.2 of the
SCB as well as both 3.1 and 3.2 of the backplane)
The switch schematics for all PCB versions (3.x of the
SCB as well as both 3.1, 3.2 and 3.3 of the backplane)
are available on the Open Hardware Repository, at
@uref{http://www.ohwr.org/documents/180}, which can also be reached
from the @i{Documents} tab of the @i{White Rabbit} project.
Plese note that only version 3.2 of both the motherboard and the backplane
has been shipped commercially; you are interested in previous versions only
if you are an early developer and have one of those in your hands.
Plese note that only version 3.2 and 3.3 of both the motherboard and
the backplane has been shipped commercially; you are interested in
previous versions only if you are an early developer and have one of
those in your hands.
@menu
* DIP Switch HW version::
@end menu
@c ==========================================================================
@node DIP Switch HW version
@section DIP Switch HW version
Since v3.3, the backplane include a DIP switch configured by the
manufacturer in order to define a specific SCB and backplane
version. This setup is then read by the software in order to load
the correct FPGA binaries and use the proper I/Os. Please be aware
that if you upgrade your SCB from LX130T to LX240T but keep the same
backplane you might need to change the DIP switch configuration.
Check the code from @code{userspace/libswitchhw/i2c_io.c} code to
know how to reconfigure the DIP switch for you upgraded device.
For example, the v3.3 backplane with v3.3 LX240T SCB must be configured as bellow:
@example
+--------------+---+---+---+---+
| DIP position | 1 | 2 | 3 | 4 |
+==============+===+===+===+===+
| DIP value | 1 | 1 | 1 | 0 |
+--------------+---+---+---+---+
@end example
@c ##########################################################################
......@@ -1382,14 +1440,98 @@ but here are some notes that may be useful. The differences are minor,
mainly in GPIO routing, but there is no complete list of changes
readily available, unfortunately.
@menu
* v3.2::
* v3.1/v3.0
@end menu
@c ==========================================================================
@node v3.2
@section v3.2
This version should be fully supported with the latest firmware but
few things haven been modified to enable backport compatibility.
@menu
* Flashing with v3.2::
* The Serial Ports in v3.2::
@end menu
@c --------------------------------------------------------------------------
@node Flashing v3.2
@subsection Flashing v3.2
The preferred way to communicate with the CPU internal ROM
is through the @b{left} mini-USB port of the switch, also called
managment USB port.
Once the USB cable plugged to your computer, the kernel should
automatically load the proper device driver, and you are expected to see
@code{/dev/ttyACM0} or equivalent in your system and it should be
enumerated as below:
@smallexample
$ lsusb | grep Atmel
Bus 001 Device 025: ID 03eb:6124 Atmel Corp. at91sam SAMBA bootloader
@end smallexample
If it is not the case, this mean that there is already some code in
the @i{dataflash}, which the switch tries to boot. In order to
disable the dataflash you need to open the switch box and fit a 1mm
jumper @footnote{On v3.0 & v3.1 this jumper does not exist. Refer
to @ref{Flashing v3.1/v3.0}} on the @i{DFEN} pin as shown in
picture below to shortcut the @i{dataflash}.
@sp 1
@center @image{jumpers, 10cm,,Booting jumpers}
@sp 2
With the jumper in place, you should reset the machine pressing
the button near the 20-pin JTAG connector. When you see that the
USB device has been enumerated, you should remove the jumper so the
programming procedure can access the @i{dataflash} device.
After these steps you can follow the normal @ref{Flashing Procedure} to
flash your device.
@c --------------------------------------------------------------------------
@node The Serial Ports in v3.2
@subsection The Serial Ports in v3.2
@sp 1
@center @image{frontpanel, 7cm,,front panel of the switch}
@sp 1
In v3.2, the debug UART of the ARM is shared with the one from FPGA, and
it can be switched by the FPGA. This multiplexed port is located on the
front panel of the switch and corresponds to the @b{right} mini-USB
@i{(Test)} port. By default, it is multiplexed on ARM UART until the FPGA
toogle it sharing it with the FPGA UART.
Therefore, if you do not toogle, it should behave exactly like the ARM
debug port in the v3.3.
@c ==========================================================================
@node v3.1/v3.0
@section v3.1/v3.0
@menu
* Flashing v3.1/v3.0::
* Serial Ports in 3.0/3.1::
@end menu
@c ==========================================================================
@c --------------------------------------------------------------------------
@node Flashing v3.1/v3.0
@section Flashing v3.1/v3.0
@subsection Flashing v3.1/v3.0
To flash any switch using the USB flasher, you need to force the ROM to
run the boot protocol called SAMBA Monitor which mean that you must
......@@ -1422,9 +1564,10 @@ to write the new information to @i{dataflash}.
The device should also appear as @code{/dev/ttyACM0} or equivalent, and
the further flashing procedure is the same as in versione 3.2.
@c ==========================================================================
@c --------------------------------------------------------------------------
@node Serial Ports in 3.0/3.1
@section Serial Ports in 3.0/3.1
@subsection Serial Ports in 3.0/3.1
If you have a 6-port @i{mini-backplane}, you can connect the 6 pins of P2 to
the similar connector on the backplane labeled as @code{Connect to
......@@ -1440,6 +1583,7 @@ without issues or damages; the figure below shows the connection
@center @image{wrs-v3-uart, 5cm}
@sp 1
@c ##########################################################################
@node Installing from Jtag
@appendix Installing from Jtag
......
......@@ -141,11 +141,8 @@ void pwm_configure_fpga(int enmask, float rate)
{
uint8_t u8speed=(uint8_t)((rate>=1)?0xff:(rate*255.0));
if(enmask & 0x1) spwm_wbr->DR0=u8speed;
else spwm_wbr->DR0=0;
if(enmask & 0x2) spwm_wbr->DR1=u8speed;
else spwm_wbr->DR0=0;
if((enmask & 0x1)>0) spwm_wbr->DR0=u8speed;
if((enmask & 0x2)>0) spwm_wbr->DR1=u8speed;
}
/* Configures a PWM output. Rate accepts range is from 0 (0%) to 1 (100%) */
......@@ -214,12 +211,12 @@ int shw_init_fans()
uint32_t val=0;
int detect, i;
TRACE(TRACE_INFO, "Configuring PWMs for fans (desired temperature = %.1f degC)...", DESIRED_TEMPERATURE);
//Set the type of PWM
if(shw_get_hw_ver()<330) is_cpu_pwn=1;
else is_cpu_pwn=0;
TRACE(TRACE_INFO, "Configuring %s PWMs for fans (desired temperature = %.1f degC)... %d",is_cpu_pwn?"CPU":"FPGA");
if(is_cpu_pwn)
{
......@@ -241,8 +238,8 @@ int shw_init_fans()
//Point to the corresponding WB direction
spwm_wbr= (volatile struct SPWM_WB *) (FPGA_BASE_ADDR + FPGA_BASE_SPWM);
//Configure SPWM register the 60=(62.5MHz÷(4kHz×2^8))−1
val= SPWM_CR_PRESC_W(60) | SPWM_CR_PERIOD_W(255);
//Configure SPWM register the 30~=(62.5MHz÷(8kHz×2^8))−1
val= SPWM_CR_PRESC_W(30) | SPWM_CR_PERIOD_W(255);
spwm_wbr->CR=val;
fan_pi.ki = 1.0;
......
......@@ -47,7 +47,10 @@ uint64_t shw_get_tics()
}
/**
* \brief Helper function to quickly display byte into binary code.
* WARNING: this returns static storage
*/
const char *shw_2binary(uint8_t x)
{
static char b[9];
......
......@@ -9,8 +9,10 @@ for arg in $(cat /proc/cmdline); do
fi;
done
# Obtain the type of FPGA (LX130XT or LX240XT)
tfpga=$($WR_HOME/bin/shw_ver -f)
$WR_HOME/bin/load-virtex $WR_HOME/lib/firmware/18ports_mb.bin
$WR_HOME/bin/load-virtex $WR_HOME/lib/firmware/18p_mb-${tfpga}.bin
$WR_HOME/bin/load-lm32 $WR_HOME/lib/firmware/rt_cpu.bin
insmod $WR_HOME/lib/modules/at91_softpwm.ko
insmod $WR_HOME/lib/modules/wr_vic.ko
......
......@@ -13,8 +13,8 @@ STRIP = $(CROSS_COMPILE)strip
OBJCOPY = $(CROSS_COMPILE)objcopy
OBJDUMP = $(CROSS_COMPILE)objdump
#
GIT_VER = $(shell git describe --always --dirty=+ | sed 's;^[a-zA-Z\-]*-\(.*\)$$;\1;' )
#
GIT_VER = $(shell git describe --always --dirty=+ | sed 's;^wr-switch-sw-;;')
GIT_USR = $(shell git config --get-all user.name)
# LOTs of includes
......
......@@ -32,6 +32,7 @@
/**
* \brief Helper function to convert mac address into a string
* WARNING: this returns static storage
*/
char *mac_to_string(uint8_t mac[ETH_ALEN])
{
......
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