... | @@ -96,6 +96,7 @@ project](https://www.ohwr.org/project/white-rabbit/wiki). |
... | @@ -96,6 +96,7 @@ project](https://www.ohwr.org/project/white-rabbit/wiki). |
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|07-10-2018|Second collection of requirements for V4 generation switch made on the [10th WR Workshop](https://www.ohwr.org/project/white-rabbit/wikis/oct2018meeting)|
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|07-10-2018|Second collection of requirements for V4 generation switch made on the [10th WR Workshop](https://www.ohwr.org/project/white-rabbit/wikis/oct2018meeting)|
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|30-09-2018 | First "Technical proposal for the design of a new White Rabbit Switch" by [Seven Solutions](https://sevensols.com/)|
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|30-09-2018 | First "Technical proposal for the design of a new White Rabbit Switch" by [Seven Solutions](https://sevensols.com/)|
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|28-11-2018 | [Seven Solutions](https://sevensols.com/) ordered to conduct preliminary design study and produce Technical <br />Specification with definition of architecture and key components selection)|
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|28-11-2018 | [Seven Solutions](https://sevensols.com/) ordered to conduct preliminary design study and produce Technical <br />Specification with definition of architecture and key components selection)|
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|11-07-2019| Candidate FPGAs: Xilinx Zynq Ultrascale+ and Intel Arria 10 |
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|31-07-2019| [Creotech](https://creotech.pl/pl/home-3-3-3-2/) ordered to perform evaluation of the required resources |
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|31-07-2019| [Creotech](https://creotech.pl/pl/home-3-3-3-2/) ordered to perform evaluation of the required resources |
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|31-07-2019| Meeting with CERN IT experts (see [notes](https://ohwr.org/project/wr-switch-hw-v4/wikis/features-choice-meeting-with-it)) |
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|31-07-2019| Meeting with CERN IT experts (see [notes](https://ohwr.org/project/wr-switch-hw-v4/wikis/features-choice-meeting-with-it)) |
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|09-10-2019|[Creotech](https://creotech.pl/pl/home-3-3-3-2/) delivered [WRS resource utilisation on Xilinx US+ FPGA](uploads/31c7019f3c24cb12ec0f8c79c108af59/WRS-v4-resource-utilization.pdf) |
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|09-10-2019|[Creotech](https://creotech.pl/pl/home-3-3-3-2/) delivered [WRS resource utilisation on Xilinx US+ FPGA](uploads/31c7019f3c24cb12ec0f8c79c108af59/WRS-v4-resource-utilization.pdf) |
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