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## Project Roadmap
|**Complete by**|**Event**|**Who**|
|---------------|----|
|2020: end March | Preliminary study of features, components, requirements, FPGA/CPU choice <br /> complete by "In-depth study of WRS-v4/18 features" document | Seven Solutions, Creotech|
|---------------|----|----|
|2020: end March | Preliminary study of features, components, requirements, FPGA/CPU choice <br /> complete by "In-depth study of WRS-v4/18 features" document | Seven Solutions, Creotech |
|2020: end May | Proposal of WRS-v4/18 main board architecture <br /> complete by "Proposal of WRS-v4/18 architecture" document | Creotech |
|2020: end May |Verification of 1Gb and 10Gb transceiver in the chosen FPGA/family| CERN |
|2020: end May | Verification of 1Gb and 10Gb transceiver in the chosen FPGA/family | CERN |
|2020: June | Request for feedback from WR community | WR Community |
|2020: end July | Update of study/proposal documents | Seven Solutions |
|2020: end December | PCB and enclosure design <br /> completed by delivery of first prototypes | Seven Solutions |
|2021: end July | Board Support Package (SW) <br /> Production Test Suite (PTS) <br /> | Seven Solutions |
|2021: end July | Board Support Package (SW) <br /> Production Test Suite (PTS) | Seven Solutions |
## Project milestones
......