... | @@ -4,7 +4,7 @@ This page provide information for people who want to contribute to the |
... | @@ -4,7 +4,7 @@ This page provide information for people who want to contribute to the |
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development of switch's HDL. It is meant to explain first steps to get
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development of switch's HDL. It is meant to explain first steps to get
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going with simulation and synthesis assuming a developer
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going with simulation and synthesis assuming a developer
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uses and has installed HDLmake (explained below), Xilinx ISE, ModelSim
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uses and has installed HDLmake (explained below), Xilinx ISE, ModelSim
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on Linux PC.
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(supporting multi-language simulation) on Linux PC.
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An sketch (unfinished) depicting architecture of switch HDL can be found
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An sketch (unfinished) depicting architecture of switch HDL can be found
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[here](https://www.ohwr.org/project/wr-switch-hdl/uploads/63a1d6b10a371fb27f72cb6c5b41ac3c/SwitchGWarchitecture.jpg).
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[here](https://www.ohwr.org/project/wr-switch-hdl/uploads/63a1d6b10a371fb27f72cb6c5b41ac3c/SwitchGWarchitecture.jpg).
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