... | ... | @@ -173,7 +173,7 @@ The following steps are needed to simulate the switch |
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3. Enter testbench/scb\_top and generate Makefile using HDLmake
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hdlmake --make-sim
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4. This should result in generation of proper Makefile (such as the
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[Makefile](https://www.ohwr.org/2975)
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[Makefile](https://www.ohwr.org/2976)
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generated for me - it will not work you your PC, but can be useful
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to see)
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cd testbench/scb\_top
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... | ... | @@ -195,13 +195,17 @@ The following steps are needed to sythesize the switch for 18 ports |
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4. Generate Makefile:
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hdlmake --make-ise
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5. This should result in generation of proper Makefile (such as the
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[Makefile](https://www.ohwr.org/2975)
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[Makefile](https://www.ohwr.org/2977)
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generated for me - it will not work you your PC, but can be useful
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to see)
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6. Run synthesis:
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make
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7. Go for lunch now
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-----
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27 June 2014
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### Files
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... | ... | |