... | ... | @@ -3,7 +3,8 @@ |
|
|
This page provide information for people who want to contribute to the
|
|
|
development of switch's HDL. It is meant to explain first steps to get
|
|
|
going with simulation and synthesis assuming a developer
|
|
|
uses HDLmake (explained below) and Linux PC.
|
|
|
uses and has installed HDLmake (explained below), Xilinx ISE, ModelSim
|
|
|
on Linux PC.
|
|
|
|
|
|
An sketch (unfinished) depicting architecture of switch HDL can be found
|
|
|
[here](https://www.ohwr.org/project/wr-switch-hdl/uploads/63a1d6b10a371fb27f72cb6c5b41ac3c/SwitchGWarchitecture.jpg).
|
... | ... | |