... | ... | @@ -6,13 +6,18 @@ going with simulation and synthesis assuming a developer |
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uses and has installed HDLmake (explained below), Xilinx ISE, ModelSim
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(supporting multi-language simulation) on Linux PC.
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An sketch (unfinished) depicting architecture of switch HDL can be found
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A sketch (unfinished) depicting architecture of switch HDL can be found
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[here](https://www.ohwr.org/project/wr-switch-hdl/uploads/63a1d6b10a371fb27f72cb6c5b41ac3c/SwitchGWarchitecture.jpg).
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The figure provides a high level of details when zoomed in; while when
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zoomed out, it should be handy in getting a global idea of HDL
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architecture. Note that the switch is under development and some details
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of the drawing might be out of date, the general picture remains.
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A description of registers that are used to control HDL modules by
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software can be found [here](https://www.ohwr.org/project/wr-switch-hdl/wikis/Documents/White-Rabbit-Switch-HDL-SW-interface)
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([v3.3](https://www.ohwr.org/project/wr-switch-hdl/uploads/adda9585b266bddbe32b55595cdb694b/switch_hdl-sw.pdf) and
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[v4](https://www.ohwr.org/project/white-rabbit/uploads/0e90236d5e9b48b41424dfc695d23cc4/switch_hdl-sw-v4.0.pdf))
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HDLmake tool is used for WR switch HDL development to make developers'
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life easier.
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