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**UNDER
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CONSTRUCTION**
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**UNDER CONSTRUCTION**
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# WR Switch gateware
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Figure 1 shows the internals of the WR Switch HDL design. It contains
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numerous modules connected with the Wishbone Crossbar. Each of them has
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a Wishbone Slave interface and a number of configuration registers that
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are read/written from main CPU through the CPU EBI/WB bridge (WB Master
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interface). Blue arrows in the figure represent the WR Frabric interface
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connections responsible for passing Ethernet frames between the
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Endpoints, Switching Core and Network Interface
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Controller.
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![](/uploads/9a152dc550b9a6e46be94aeb43c2cad3/switch_hdl.png)
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Fig. 1: Top HDL design of the WR Switch
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## Real-Time Subsystem
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It contains modules responsible for the timekeeping. The components are
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internally connected through WB crossbar (fig. 2) and controlled from
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Lattice Mico 32 and main CPU (through primary WB crossbar in the top
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design).
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![](/uploads/eaafbf06c0bd03067a0c8151477a1360/rt_sub.png)
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Fig. 2: Internal layout of Real-Time Subsystem component
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-----
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... | ... | @@ -90,7 +105,7 @@ CONSTRUCTION** |
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-----
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15 May 2013
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23 May 2013
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... | ... | |