... | ... | @@ -30,6 +30,7 @@ The White Rabbit PTP Core can operate in one of the following modes: |
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|Xilinx|Kintex Ultrascale|GTHE3,<br/> GTH-US,<br/> GTY-US|SIS8300|Work in progress (uses different Serdes (GTH, GTY) than Kintex, requires a new wrapper with bitslide, and making sure the Serdes is deterministic). [Contact us](/Wrpc-core#contacts). [See presentation](https://ohwr.org/project/white-rabbit/wikis/uploads/f6d568840245659356d41c38060152e8/WRS_WRPC_status_plans.pdf)|
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|Xilinx|Zynq Ultrascale+|GTHE4||[Contact us](/Wrpc-core#contacts). [See presentation](https://ohwr.org/project/white-rabbit/wikis/uploads/f6d568840245659356d41c38060152e8/WRS_WRPC_status_plans.pdf)|
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|Xilinx|Zynq-7 (=Kintex-7 + ARM uP)|GTX-7|[fasec_ref_design](https://www.ohwr.org/project/wr-cores/tree/master/)|[FASEC](https://www.ohwr.org/project/fasec/wiki), Seven Solutions.|
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|Xilinx|Zynq-7 (=Kintex-7 + ARM uP)|GTX-7|[spec7](https://ohwr.org/project/spec7)|Nikkef|
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|Altera|Arria II|||GSI|
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|Altera|[Arria V](platform-arria5)||[vfchd_ref_design](https://www.ohwr.org/project/wr-cores/tree/master/)|[VFC-HD](board-vfc-hd), GSI|
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