... | @@ -99,7 +99,9 @@ VHDL generics to specify Tx and Rx pair configuration: |
... | @@ -99,7 +99,9 @@ VHDL generics to specify Tx and Rx pair configuration: |
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Information on network configuration is stored in VHDL records,
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Information on network configuration is stored in VHDL records,
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respectively `t_tx_streamer_cfg` and `t_rx_streamer_cfg`. These can be
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respectively `t_tx_streamer_cfg` and `t_rx_streamer_cfg`. These can be
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written to directly from the application or can take their value from
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written to directly from the application or can take their value from
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the wishbone memory map (External configuration)
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the [wishbone memory
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map](https://www.ohwr.org/project/wr-cores/uploads/123c8f37ddad8747f18e780978d7bc03/wr_streamers_wb.pdf)
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(External configuration)
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`t_tx_streamer_cfg` contains the following fields:
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`t_tx_streamer_cfg` contains the following fields:
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