... | @@ -99,11 +99,11 @@ documentation generator. May contain inline HTML code. | |
... | @@ -99,11 +99,11 @@ documentation generator. May contain inline HTML code. | |
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prefix for each block which is used for generation of VHDL port/signal
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prefix for each block which is used for generation of VHDL port/signal
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names and C macros. Names are generated by concatenating the prefixes:
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names and C macros. Names are generated by concatenating the prefixes:
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`peripheral_reg_field`. In this
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`peripheral_reg_field`. In this
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[example](WB-file-syntax-examples#gpioport), the signal name of register
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[example](WB-file-syntax-examples#simple-general-purpose-i/o-port), the
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"DDR" would be `gpio_ddr_o`. The format of `prefix` value must follow
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signal name of register "DDR" would be `gpio_ddr_o`. The format of
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the HDL/C language syntax rules and your coding style. Note that you can
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`prefix` value must follow the HDL/C language syntax rules and your
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provide either separate prefixes for C/HDL languages `c_prefix`,
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coding style. Note that you can provide either separate prefixes for
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`hd_prefix` a single `prefix` for both. |
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C/HDL languages `c_prefix`, `hd_prefix` a single `prefix` for both. |
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