Commit 36d0b7be authored by Maciej Lipinski's avatar Maciej Lipinski

Final version provided for print

parent f4ae7543
......@@ -254,9 +254,9 @@ INRIM & Italy & 70~km & 610ps $\pm$47ps\\ \hline
\begin{frame}{Layer 1 Syntonisation}
%\begin{block}{Common clock for the entire network}
\begin{itemize}
\item All network devices use the same physical layer clock.
\item Clock is encoded in the Ethernet carrier and recovered by the receiver chip.
\item Phase detection allows sub-ns delay measurement.
\item All network devices use the same physical layer clock
\item Clock is encoded in the Ethernet carrier and recovered by the receiver chip
\item Phase detection allows sub-ns delay measurement
\end{itemize}
%\end{block}
\vspace{-0.2cm}
......@@ -316,7 +316,7 @@ INRIM & Italy & 70~km & 610ps $\pm$47ps\\ \hline
\begin{center}
\includegraphics<1-2>[width=1.0\textwidth]{protocol/link-delay-model-detailed-1.jpg}
\includegraphics<3>[width=1.0\textwidth]{protocol/link-delay-model-detailed-2.jpg}
\includegraphics<4->[width=1.0\textwidth]{protocol/link-delay-model-detailed-3.jpg}\\
\includegraphics<4->[width=1.0\textwidth]{protocol/link-delay-model-detailed-3.jpg}\\\pause\pause\pause
\tiny See: \textit{WR Calibration} [9]
\end{center}
\end{columns}
......@@ -346,7 +346,7 @@ INRIM & Italy & 70~km & 610ps $\pm$47ps\\ \hline
\end{center}
\begin{center}\scriptsize
NOTE: Work started on a new switch with 10 gigabit Ethernet
NOTE: Work started on a new WR switch with 10 Gigabit Ethernet
\end{center}
\end{frame}
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
......@@ -364,10 +364,10 @@ INRIM & Italy & 70~km & 610ps $\pm$47ps\\ \hline
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
\begin{frame}{WR Node [11, 12]: carrier board + FMC}
\begin{frame}{WR Node [11]: carrier board + FMC}
\vspace{-0.5cm}
\begin{center}
\includegraphics[width=10cm]{node/shw_kit2.png}
\includegraphics[width=9.5cm]{node/shw_kit2.png}
\end{center}
\begin{columns}[c]
......@@ -375,11 +375,12 @@ INRIM & Italy & 70~km & 610ps $\pm$47ps\\ \hline
\column{.98\textwidth}
\vspace{-0.5cm}
\begin{block}{FMC-based Hardware Kit}
\begin{itemize}
\begin{itemize}\small
% \item Carrier boards in PCI-Express, VME, PXIe
\item All carrier cards are equipped with a White Rabbit port.
\item All carrier cards are equipped with a White Rabbit port
\item All carrier cards instantite WR PTP Core [12]
\item Mezzanines can use the accurate clock signal and ``TAI''
\\ (synchronous sampling clock, trigger time tag, ...).
\\ (synchronous sampling clock, trigger time tag, ...)
\end{itemize}
\end{block}
......@@ -483,14 +484,14 @@ INRIM & Italy & 70~km & 610ps $\pm$47ps\\ \hline
\column{0.71\textwidth}\vspace{-0.5cm}
\textcolor{white}{dddd\\dddd}
\begin{itemize}\scriptsize
\item<1-> \textbf{SFP} -- tx wavelength uncertainty
\item<1-> \textbf{SFP} -- tx wavelength
\begin{itemize}\scriptsize
\item<2-> IEEE802.3ah allows nominal value departures\\(10nm at 1490nm, 50nm at 1310nm)
\item<3-> Linear dependency on SFP temp:
\begin{itemize}\tiny
\item 1310nm: $0.4~~\sim0.5~~nm/K$ $\Rightarrow$ $~~~0.11 ps/(K \cdot km)$ [7]
\item 1490nm: $0.09\sim0.12 nm/K$ $\Rightarrow$ $-0.51 ps/(K \cdot km)$ [7]
\item 1550nm: ~~~~~~~~~$\approx0.1~~nm/K$ $\Rightarrow$ $~~~1.7~~ps/(K \cdot km)$ [8]
\item 1310nm: $0.4~~\sim0.5~~nm/K$ \textcolor<1-3>{white}{$\Rightarrow$ $~~~0.11 ps/(K \cdot km)$ [7]}
\item 1490nm: $0.09\sim0.12 nm/K$ \textcolor<1-3>{white}{$\Rightarrow$ $-0.51 ps/(K \cdot km)$ [7]}
\item 1550nm: ~~~~~~~~~$\approx0.1~~nm/K$ \textcolor<1-3>{white}{$\Rightarrow$ $~~~1.7~~ps/(K \cdot km)$ [8]}
\end{itemize}
% \begin{itemize}\tiny
% \item 1310nm: $0.4\sim0.5 nm/K$ (AXGE-1254 SFP) [6]
......@@ -510,7 +511,7 @@ INRIM & Italy & 70~km & 610ps $\pm$47ps\\ \hline
% \end{itemize}
\end{itemize}
\item<5-> \textbf{Fiber} -- chromatic dispersion variation
\item<5-> \textbf{Fiber} -- chromatic dispersion
\begin{itemize}\scriptsize
\item Linear dependency on fiber temp:
\begin{itemize}\tiny
......@@ -520,7 +521,7 @@ INRIM & Italy & 70~km & 610ps $\pm$47ps\\ \hline
\end{itemize}
\end{itemize}
\item<6-> Significant for links $>10km$
\item<7-> Remedy: temp-stabilized SFP, closer wavelength \\(C21\& C23 @ 1560.61 \& 1558.98 in SKA [8])
\item<7-> Remedy: temp-stabilized laser, accurate and close wavelengths (C21/C23@1560.61/1558.98nm, SKA [8])
\end{itemize}
\textcolor{white}{dddd\\dddd\\dddd\\dddd}
\column{0.45\textwidth}
......@@ -559,7 +560,7 @@ INRIM & Italy & 70~km & 610ps $\pm$47ps\\ \hline
\item Flicker PM noise: -100 dBc at 1 Hz
\begin{itemize}\tiny
\item Dominant $<$ 10Hz,
\item MDEV at $\tau=1s$ to 4E-13
\item MDEV 4E-13 at $\tau=1s$
\item LVDS input clock buffer and clock routing
\end{itemize}
\item White PM noise: -108 dBc
......@@ -572,7 +573,7 @@ INRIM & Italy & 70~km & 610ps $\pm$47ps\\ \hline
\item<3-> \textbf{GTX}
\begin{itemize}\scriptsize
\item Flicker PM noise: -100 dBc at 1 Hz
\item White PM noise: -106 dBc\\ MDEV at $\tau=1s$ to 4E-13
\item White PM noise: -106 dBc\\ MDEV 4E-13 at $\tau=1s$
\end{itemize}
\item<4-> Remedy: none, inherent to technology
\end{itemize}
......@@ -580,6 +581,7 @@ INRIM & Italy & 70~km & 610ps $\pm$47ps\\ \hline
\begin{center}\vspace{-0.5cm}
\includegraphics<1>[width=.99\textwidth]{measurements/DDMTD-noise.jpg}
\includegraphics<2>[width=.99\textwidth]{measurements/DDMTD-future-tech-noise.jpg}
\end{center}
\end{columns}\vspace{0.1cm}
\begin{center}
......@@ -597,7 +599,7 @@ INRIM & Italy & 70~km & 610ps $\pm$47ps\\ \hline
\column{0.67\textwidth}\vspace{-0.5cm}
\begin{itemize}\scriptsize
\item<1-> Accumulation of phase noise in lower frequencies
\item<2-> \textbf{VCXO} - Boundary Clock Only
\item<2-> \textbf{VCXO} - Boundary Clock only
\begin{itemize}\scriptsize
\item Phase noise leaking from the local oscillator
\item Instabilities induced by cooling airflow
......@@ -632,7 +634,7 @@ INRIM & Italy & 70~km & 610ps $\pm$47ps\\ \hline
\includegraphics<1-2>[width=.99\textwidth]{measurements/phase_noise_v3_4.pdf}
\includegraphics<3>[width=0.98\textwidth]{switch/mmcm_noise2.jpg}
\includegraphics<4>[width=.99\textwidth]{measurements/phase_noise_v3_4.pdf}
\includegraphics<5>[width=.45\textheight, angle=90]{measurements/WRSlowJitter/rsz_3d_image__1_.jpg}
\includegraphics<5>[width=.45\textheight, angle=90]{measurements/WRSlowJitter/rsz_3d_image__1_.jpg} \textcolor{white}{dddd\\dddd}
\tiny
\begin{table}[!ht]
\centering
......@@ -709,7 +711,7 @@ INRIM & Italy & 70~km & 610ps $\pm$47ps\\ \hline
\begin{itemize}\scriptsize
\item High Accuracy sub-committee dedicated to WR
\item High Accuracy, a.k.a. WR, to become a third Default PTP Profile
\item Revised standard expected in 2019.
\item Revised standard expected in 2019
\end{itemize}
\item<2-> Long-haul link [18, 19]:
\begin{itemize}\scriptsize
......@@ -750,10 +752,10 @@ INRIM & Italy & 70~km & 610ps $\pm$47ps\\ \hline
\end{center}
\begin{block}{Distributed Direct Digital Synthesis}
\begin{itemize}
\item Replaces dozens of cables with a single fiber.
\item Works over big distances without degrading signal quality.
\item Can provide various clocks (RF of many rings and linacs) with a single, standard link.
\item At CERN, ongoing work to distribute 200 MHz RF with 0.25ps RMS jitter and $\pm$10ps accuracy.
\item Replaces dozens of cables with a single fiber
\item Works over big distances without degrading signal quality
\item Can provide various clocks with a single, standard link
\item At CERN, ongoing work to distribute 200 MHz RF with 0.25ps RMS jitter and $\pm$10ps accuracy
\end{itemize}
\end{block}
\end{frame}
......@@ -764,9 +766,9 @@ INRIM & Italy & 70~km & 610ps $\pm$47ps\\ \hline
\end{center}
\begin{block}{}
\begin{itemize}
\item Common clock in entire network: no skew between ADCs.
\item Ability to sample with different clocks via Distributed DDS.
\item External triggers can be time tagged with a TDC and used to reconstruct the original time base in the operator's PC.
\item Common clock in entire network: no skew between ADCs
\item External triggers can be time tagged with a TDC and used to reconstruct the original time base in the operator's PC
\item Ability to sample with different clocks via Distributed DDS
\end{itemize}
\end{block}
\end{frame}
......@@ -780,7 +782,7 @@ INRIM & Italy & 70~km & 610ps $\pm$47ps\\ \hline
\pause
\item Standard-compatible and standard-extending
\pause
\item Active participation in IEEE1588 revision process
\item Standardized within upcoming revision of IEEE1588
\pause
\item A versatile solution for general control and data acquisition
\pause
......@@ -875,21 +877,21 @@ $[21]$ \textbf{White Rabbit Trigger Distribution: }
\end{frame}
\begin{frame}{GM Switch with LJD: PM noise and Modfied ADEV}
\begin{frame}{GM Switch with LJD: PM noise and Modified ADEV}
\begin{center}
\includegraphics[width=.5\textwidth]{measurements/WRSlowJitter/pn.png}
\includegraphics[width=.5\textwidth]{measurements/WRSlowJitter/mdev.png}
\end{center}
\end{frame}
\begin{frame}{BC Switch with LJD: PM noise and Modfied ADEV}
\begin{frame}{BC Switch with LJD: PM noise and Modified ADEV}
\begin{center}
\includegraphics[width=.5\textwidth]{measurements/WRSlowJitter/slave_pn.png}
\includegraphics[width=.5\textwidth]{measurements/WRSlowJitter/slave_mdev.png}
\end{center}
\end{frame}
\subsection{Standardization}
\begin{frame}{WR standardization in IEEE1588}
% \subsection{Standardization}
\begin{frame}{WR standardization in IEEE1588 (1)}
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
\begin{columns}[c]
\column{.8\textwidth}
......@@ -914,7 +916,7 @@ $[21]$ \textbf{White Rabbit Trigger Distribution: }
\end{center}
\end{columns}
\end{frame}
\begin{frame}{WR standardization in IEEE1588}
\begin{frame}{WR standardization in IEEE1588 (2)}
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
\begin{center}
\includegraphics<1>[width=1.0\textwidth]{p1588/HAin1588-0.jpg}
......
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