... | @@ -5,9 +5,9 @@ synthesized and used as a standalone WR interface inside a single FPGA |
... | @@ -5,9 +5,9 @@ synthesized and used as a standalone WR interface inside a single FPGA |
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chip or as an IP core in a larger design. WRPC was created to simplify
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chip or as an IP core in a larger design. WRPC was created to simplify
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the integration of WR into both existing and embedded devices and
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the integration of WR into both existing and embedded devices and
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systems. This wiki page briefly describes the hardware requirements to
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systems. This wiki page briefly describes the hardware requirements to
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integrate WRPC into two projects:
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integrate WRPC into two projects: [Upgrading an existing
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[WRReferenceDesign\#Upgrading-an-existing-system](WRReferenceDesign#upgrading-an-existing-system)
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system](WRReferenceDesign#upgrading-an-existing-system) with WR and
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with WR and building a compact embedded solution based on WR.
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building a compact embedded solution based on WR.
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WRPC implements an IEEE1588 ordinary clock capable of reaching
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WRPC implements an IEEE1588 ordinary clock capable of reaching
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sub-nanosecond accuracies and working both in Master and Slave modes. In
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sub-nanosecond accuracies and working both in Master and Slave modes. In
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