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informal and sketchy). The MCH is in fact made of a sandwich of 4
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PCBs:
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![](/uploads/f3ecee23a272a459ffacd9add161463b/sandwich.jpg)
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![](https://ohwr.org/project/white-rabbit/uploads/f3ecee23a272a459ffacd9add161463b/sandwich.jpg)
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- The uplink board (aka the timing board) contains the uplink PHYs,
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the timing FPGA and its associated gear (DMTD, PLLs, clock
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... | ... | @@ -64,6 +64,6 @@ This is done with a watchdog mechanism, hence the name of this CPU. |
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### Files
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* [MCH.dia](/uploads/6856cb6549b52e216f4089e04d108f4f/MCH.dia)
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* [MCH.pdf](/uploads/5b5dc056113b60e6c750061272050f9b/MCH.pdf)
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* [sandwich.jpg](/uploads/f3ecee23a272a459ffacd9add161463b/sandwich.jpg) |
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\ No newline at end of file |
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* [MCH.dia](https://ohwr.org/project/white-rabbit/uploads/6856cb6549b52e216f4089e04d108f4f/MCH.dia)
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* [MCH.pdf](https://ohwr.org/project/white-rabbit/uploads/5b5dc056113b60e6c750061272050f9b/MCH.pdf)
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* [sandwich.jpg](https://ohwr.org/project/white-rabbit/uploads/f3ecee23a272a459ffacd9add161463b/sandwich.jpg) |
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\ No newline at end of file |