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reliable, accurate traceability; devices to improve the robustness
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and resilience of PTP-WR. Moreover, some tests involving industrial
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users are planned.
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- **DMTD clock generation using FPGA internal PLLs**: WR nodes
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typically need to include a dedicated controllable oscillator to
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generate the offset frequency used by the DMTD phase detector. This
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presentation shows an alternative method in which that frequency is
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internally generated in the FPGA, with no need for the additional
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oscillator. This can help simplify the design of future nodes and
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can also make it easier to WR-enable existing boards.
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- **White Rabbit in Financial Markets**: Deutsche Börse Group
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operates, amongst other things, two electronic financial markets.
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Xetra, the reference market for exchange trading in German shares
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This contribution gives an overview on the achievements, shares
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experience and gives an outlook to the planned activities for the
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next years.
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- **WR results in 7S and the University of Granada**: a presentation
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made of three parts: a) Scalability and performance of the WR
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protocol over large networks; b) Redundant WR technology: HSR
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White-Rabbit; c) WR Timing solution for SST CTA telescopes.
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... | ... | |