... | @@ -36,7 +36,7 @@ If you're looking for a VME-bus Slave, see the project [VME64x to Wishbone Core] |
... | @@ -36,7 +36,7 @@ If you're looking for a VME-bus Slave, see the project [VME64x to Wishbone Core] |
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# HDL architecture
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# HDL architecture
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![](/uploads/de3a50030fa9acb647827501af06eebb/pcie-vme-hdl.png)
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![](https://ohwr.org/project/pcie-vme-bridge/uploads/de3a50030fa9acb647827501af06eebb/pcie-vme-hdl.png)
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The internal HDL architecture of the PCIe-to-VME bridge is presented in
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The internal HDL architecture of the PCIe-to-VME bridge is presented in
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the figure above. It is built around the Wishbone (WB) bus, an
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the figure above. It is built around the Wishbone (WB) bus, an
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... | @@ -143,5 +143,5 @@ SRAM modules. |
... | @@ -143,5 +143,5 @@ SRAM modules. |
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17 April 2023
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17 April 2023
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### Files
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### Files
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* [pcie-vme-hdl.png](/uploads/de3a50030fa9acb647827501af06eebb/pcie-vme-hdl.png)
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* [pcie-vme-hdl.png](https://ohwr.org/project/pcie-vme-bridge/uploads/de3a50030fa9acb647827501af06eebb/pcie-vme-hdl.png)
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