... | @@ -124,3 +124,12 @@ core for Xilinx Spartan-6 FPGAs. |
... | @@ -124,3 +124,12 @@ core for Xilinx Spartan-6 FPGAs. |
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- [fmc-delay-1ns-8cha](https://www.ohwr.org/project/fmc-delay-1ns-8cha)
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- [fmc-delay-1ns-8cha](https://www.ohwr.org/project/fmc-delay-1ns-8cha)
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- [fmc-tdc](https://www.ohwr.org/project/fmc-tdc)
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- [fmc-tdc](https://www.ohwr.org/project/fmc-tdc)
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# Other works
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- Claudio Favi and Edoardo Charbon: *A 17ps Time-to-Digital Converter
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Implemented in 65nm FPGA Technology*
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[PDF](http://infoscience.epfl.ch/record/139431)
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- Jinyuan Wu and Zonghan Shi: *The 10-ps Wave Union TDC: Improving
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FPGA TDC Resolution beyond Its Cell Delay*
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[PDF](http://www-ppd.fnal.gov/EEDOffice-W/Projects/ckm/comadc/PID765918.pdf)
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