... | @@ -10,8 +10,8 @@ core for Xilinx Spartan-6 FPGAs. |
... | @@ -10,8 +10,8 @@ core for Xilinx Spartan-6 FPGAs. |
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- Fixed point output:
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- Fixed point output:
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- Integer part is number of FPGA clocks (coarse counter).
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- Integer part is number of FPGA clocks (coarse counter).
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- 13-bit fractional part.
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- 13-bit fractional part.
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- With a 8ns FPGA clock, LSB corresponds to 0.98ps.
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- With a 125MHz FPGA clock, LSB corresponds to 0.98ps.
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- Typical range: 268ms (using a \<25.13\>-bit value).
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- Typical range: 268ms (using a \<25.13\>-bit value at 125MHz).
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- Number of coarse counter bits configurable with a VHDL generic.
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- Number of coarse counter bits configurable with a VHDL generic.
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- Latency: 5 cycles at 125MHz (not including host interface module).
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- Latency: 5 cycles at 125MHz (not including host interface module).
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- Multiple channels.
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- Multiple channels.
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