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# Project description
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The TDC core is a high precision (sub-nanosecond) [time to digital conversion](http://en.wikipedia.org/wikis/Time_to_digital_converter) core for Xilinx Spartan-6 FPGAs.
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# Specifications
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- Based on a calibrated delay line
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- Delay line implemented with carry chain (CARRY4) primitives
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- Expected precision: 50-100ps
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