... | ... | @@ -16,7 +16,7 @@ Projects](https://www.ohwr.org/project/fmc-projects). |
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## Main Features
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- VME64x interface (with P0 connector)
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- VME64x interface
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- VME P2 connector provides access to a Rear Transition Module
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(compatible to
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[VFC](https://www.ohwr.org/project/fmc-vme-carrier/wiki))
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... | ... | @@ -49,7 +49,7 @@ Projects](https://www.ohwr.org/project/fmc-projects). |
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o 1x miniUSB connector
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- Internal connectors
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o Xilinx-style JTAG
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o VME64x, with some P2/P0 lines going to the main FPGA
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o VME64x, with some P2 lines going to the main FPGA
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- FPGA configuration
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o from SPI flash or via VME. Default method settable via jumper
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- Stand-alone features
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... | ... | @@ -97,12 +97,12 @@ Projects](https://www.ohwr.org/project/fmc-projects). |
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</tr>
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<tr class="even">
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<td>10-11-2011</td>
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<td>Schematics design under way. Expect a version to review by end November.</td>
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<td>Schematics design under way. Expect a version to review by end <del>November</del> December.</td>
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</tr>
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</tbody>
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</table>
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-----
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Erik van der Bij, Matthieu Cattin, Tomasz Wlostowski - 31 October 2011
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Erik van der Bij, Matthieu Cattin, Tomasz Wlostowski - 12 December 2011
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