... | ... | @@ -15,7 +15,7 @@ counter part](https://www.ohwr.org/project/fmc-vme-carrier) can be used. |
|
|
Other FMC projects and the FMC standard are described in [FMC
|
|
|
Projects](https://www.ohwr.org/project/fmc-projects).
|
|
|
|
|
|
SPEC\_under\_design.bmp
|
|
|
![](/uploads/b9ea47be8f4a6a411dd444e432868bd7/spec.JPG)
|
|
|
*Image of PCB under design.**
|
|
|
|
|
|
## Main Features
|
... | ... | @@ -155,11 +155,16 @@ Clock missing. Supply Xilinx wrong. Cleanup required.</td> |
|
|
<td>05-11-2010</td>
|
|
|
<td>Design finished. Production will start. Expect boards by <del>mid December</del> January.</td>
|
|
|
</tr>
|
|
|
<tr class="even">
|
|
|
<td>20-12-2010</td>
|
|
|
<td>Production of 3 prototype board finished (see photo above)</td>
|
|
|
</tr>
|
|
|
</tbody>
|
|
|
</table>
|
|
|
|
|
|
-----
|
|
|
|
|
|
Tomasz Wlostowski - 20 December 2010
|
|
|
Erik van der Bij - 13 December 2010
|
|
|
|
|
|
|
... | ... | |