... | ... | @@ -33,7 +33,7 @@ Projects](https://www.ohwr.org/project/fmc-projects). |
|
|
- 1x low-jitter frequency synthesizer (TI CDCM61004, fixed
|
|
|
configuration, Fout=125MHz)
|
|
|
- On board memory
|
|
|
- 1x 2Gbit (256 MByte) DDR3
|
|
|
- 1x 2Gbit (256 MByte) DDR3 (MT41J128M16HA-15E)
|
|
|
- 1x SPI 32Mbit flash PROM for multiboot FPGA powerup
|
|
|
configuration, storage of the FPGA firmware or of critical data
|
|
|
- Miscellaneous
|
... | ... | @@ -178,7 +178,7 @@ Reviewing will be done by CERN.</td> |
|
|
|
|
|
-----
|
|
|
|
|
|
Erik van der Bij, Matthieu Cattin, Tomasz Wlostowski - 13 November 2012
|
|
|
Erik van der Bij, Matthieu Cattin, Tomasz Wlostowski - 30 November 2012
|
|
|
|
|
|
|
|
|
|
... | ... | |