... | ... | @@ -30,9 +30,11 @@ o FMC connectivity: all 34 differential pairs connected, 1 GTP |
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transceiver with clock, 2 clock pairs, JTAG
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\* 1 Spartan6 FPGA (XC6SLX45T)
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\* Simple clocking resources
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o 1 10-280 MHz Programmable XO Oscillator (Silicon Labs Si570)
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o 2 25 MHz TCXOs controlled by a DAC
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o 1 low-jitter frequency synthesizer (TI CDCM61004)
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o 1 10-280 MHz I2C Programmable XO Oscillator (Silicon Labs Si570)
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o 2 25 MHz TCXOs controlled by two DACs with SPI interface (Linear
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Technology LTC2641)
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o 1 low-jitter frequency synthesizer (TI CDCM61004, parallel bus
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controlled)
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\* On board memory
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o A 2Gbit DDR3
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o 1 SPI 128Mbit flash PROM for multiboot FPGA powerup configuration,
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... | ... | @@ -44,7 +46,7 @@ o Programmable LED |
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o FMC front panel
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\* Internal connectors
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o 1 JTAG header for Xilinx programming during debugging
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o 1 or 2 SATA connectors if don't add much cost
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o 1 e-SATA connector
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\* FPGA configuration. The FPGA can optionally be programmed from:
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o GN4124 SPRIO interface (loaded by software driver at startup)
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o JTAG header
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... | ... | @@ -158,7 +160,7 @@ Clock missing. Supply Xilinx wrong. Cleanup required.</td> |
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-----
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Erik van der Bij - 30 November 2010
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Erik van der Bij - 9 December 2010
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