... | @@ -89,7 +89,7 @@ SCB board. Modification of FPGA pins and minor changes inside the |
... | @@ -89,7 +89,7 @@ SCB board. Modification of FPGA pins and minor changes inside the |
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controller. **Test completed and passed successfully**
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controller. **Test completed and passed successfully**
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1. Development of a bridge interface between the QDRII memory
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1. Development of a bridge interface between the QDRII memory
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controller and wishbone bus. \* \*
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controller and wishbone bus. ****
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# Documents
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# Documents
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