... | @@ -35,8 +35,9 @@ RaToPUS is designed in two stages: |
... | @@ -35,8 +35,9 @@ RaToPUS is designed in two stages: |
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![RaToPUS_architecture](uploads/66f51c94432aee02d2dc34853ff8f936/RaToPUS_architecture.png)
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![RaToPUS_architecture](uploads/66f51c94432aee02d2dc34853ff8f936/RaToPUS_architecture.png)
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## Design files
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## Design and simulation files
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- [prototype v0.3](https://ohwr.org/project/psu-rad-acdc-230v-12v5v-110w/wikis/uploads/4747e61d2e8737692d3224c62e4497f8/ratopus_v0.3.zip): 60W isolated 48VDC to 12VDC
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- [prototype v0.3](https://ohwr.org/project/psu-rad-acdc-230v-12v5v-110w/wikis/uploads/4747e61d2e8737692d3224c62e4497f8/ratopus_v0.3.zip): 60W isolated 48VDC to 12VDC
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- [LTSpice simulation file for RaToPUS v0.3] (uploads/e25402dab14486086a6518b05c1d3e81/ratopus_simulation_v0.3.zip)
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## Related links and documents
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## Related links and documents
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