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nanoFIP - Gateware
Commit 24c51736 authored by egousiou's avatar egousiou
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changes in wf_var_rdy_generator for slone mode. 

removal from wf_engine_control of the check of rp_dat length in slone (there may be > 2 data bytes)

git-svn-id: http://svn.ohwr.org/cern-fip/trunk/hdl/design@99 7f0067c9-7624-46c7-bd39-3fb5400c0213
parent afec7029
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nanofip.vhd
View file @ 24c51736
......@@ -146,9 +146,9 @@ entity nanofip is
cyc_i : in std_logic;
we_i : in std_logic; --! Write enable
adr_i : in std_logic_vector ( 9 downto 0); --! Address
dat_i : in std_logic_vector (15 downto 0); --! Data in
DAT_I : in std_logic_vector (15 downto 0); --! Data in
dat_o : out std_logic_vector (15 downto 0); --! Data out
DAT_O : out std_logic_vector (15 downto 0); --! Data out
ack_o : out std_logic --! Acknowledge
);
......@@ -331,7 +331,7 @@ begin
wb_stb_r_edge_p_i => s_wb_stb_r_edge,
wb_cyc_i => s_wb_cyc_synch,
wb_ack_cons_p_o => s_ack_consumed,
data_o => dat_o,
data_o => DAT_O,
rx_Ctrl_byte_o => s_ctrl_byte_received,
rx_PDU_byte_o => s_PDU_byte_received,
rx_Length_byte_o => s_length_byte_received,
......@@ -424,7 +424,7 @@ begin
var1_access_a_i => var1_acc_i,
var2_access_a_i => var2_acc_i,
var3_access_a_i => var3_acc_i,
dat_a_i => dat_i,
dat_a_i => DAT_I,
rate_a_i => rate_i,
subs_a_i => subs_i,
m_id_a_i => m_id_i,
......
wf_VAR_RDY_generator.vhd
View file @ 24c51736
......@@ -22,7 +22,11 @@ use work.WF_PACKAGE.all; --! definitions of supplemental types, subtypes, c
--
--
--! @brief Generation of the nanoFIP output signals VAR1_RDY, VAR2_RDY, VAR3_RDY according to
--! the variable that is being treated (WF_engine_control signal)
--! the variable that is being treated (var_i) and to the correct frame indicator,
--! cons_frame_ok_p_i.
--! If the received variable is the var_rst, the unit generates the signals
--! rst_nFIP_and_FD_p and assert_RSTON_p, according to the data bytes received and to
--! the correct frame indicator, cons_frame_ok_p_i.
--
--
--! @author Pablo Alvarez Sanchez (pablo.alvarez.sanchez@cern.ch)
......@@ -46,7 +50,10 @@ use work.WF_PACKAGE.all; --! definitions of supplemental types, subtypes, c
---------------------------------------------------------------------------------------------------
--
--! \n\n<b>Last changes:</b>\n
-- EG treatment of reset vars
--! 10/2010 v0.01 EG First version \n
--! 11/2011 v0.02 EG Treatment of reset vars added to the unit
--! Correction on var1_rdy, var2_rdy for slone
--
---------------------------------------------------------------------------------------------------
--
--! @todo
......@@ -64,30 +71,30 @@ entity WF_VAR_RDY_generator is
port (
-- INPUTS
-- User Interface general signals (synchronized)
uclk_i : in std_logic; --! 40MHz clock
slone_i : in std_logic; --! Stand-alone mode
subs_i : in std_logic_vector (7 downto 0); --! Station address
uclk_i : in std_logic; --! 40MHz clock
slone_i : in std_logic; --! Stand-alone mode
subs_i : in std_logic_vector (7 downto 0); --! Station address
-- Signal from the WF_reset_unit unit
nFIP_urst_i : in std_logic; --! internal reset
nFIP_urst_i : in std_logic; --! internal reset
-- Signals from WF_cons_frame_validator
cons_frame_ok_p_i : in std_logic; --!pulse after a valid consumed frame
var_i : in t_var; --! variable that is being treated
cons_frame_ok_p_i : in std_logic; --! pulse after a correct consumed frame
var_i : in t_var; --! variable that is being treated
-- Signals from WF_cons_bytes_from_rx
rx_var_rst_byte_1_i : in std_logic_vector (7 downto 0); --! First & second data bytes of a
rx_var_rst_byte_2_i : in std_logic_vector (7 downto 0); --! reset variable
rx_var_rst_byte_1_i : in std_logic_vector(7 downto 0); --! First & second data bytes of a
rx_var_rst_byte_2_i : in std_logic_vector(7 downto 0); --! reset variable
-- OUTPUT
-- nanoFIP output signals
var1_rdy_o : out std_logic;
var2_rdy_o : out std_logic;
var3_rdy_o : out std_logic;
var1_rdy_o : out std_logic;
var2_rdy_o : out std_logic;
var3_rdy_o : out std_logic;
-- Signals for the WF_reset_unit
assert_RSTON_p_o : out std_logic;
assert_RSTON_p_o : out std_logic;
rst_nFIP_and_FD_p_o : out std_logic
);
......@@ -100,7 +107,7 @@ end entity WF_VAR_RDY_generator;
architecture rtl of WF_VAR_RDY_generator is
signal s_var1_received, s_var2_received, cons_frame_ok_p_d1 : std_logic;
signal s_rst_nFIP_and_FD, s_assert_RSTON : std_logic;
signal s_rst_nFIP_and_FD, s_assert_RSTON : std_logic;
--=================================================================================================
-- architecture begin
......@@ -110,32 +117,50 @@ signal s_rst_nFIP_and_FD, s_assert_RSTON : std_logic;
---------------------------------------------------------------------------------------------------
--!@brief Synchronous process VAR_RDY_Generation:
--! The signal var_i gets its value (var1, var2, var3, presence etc) after the reception of a valid
--! id_dat frame and retains it until the end of the reception of a consumed rp_dat or the end of
--! the transmission of a produced rp_dat.
--! For produced variables, the signal var_i gets its value (var3, var_presence, var_identif) after
--! the reception of a correct ID_DAT frame (with correct FSS, Control, PDU_TYPE, Length, CRC and
--! FES bytes and without unexpected code violations) and retains it until the end of the
--! transmission of the corresponding RP_DAT (in detail, until the end of the transmission of the
--! RP_DAT.data field; var_i becomes var_whatever during the RP_DAT.FCS and RP_DAT.FES transmission)
--! For consumed variables, var_i gets its value (var1, var2, var_rst) after the reception of a
--! correct ID_DAT frame and of a correct FSS of the corresponding RP_DAT frame and it retains it
--! unitl the end of the reception.
--! Memory Mode:
--! In memory mode, since the three memories (consumed, consumed broadcast, produced) are
--! independant, when a produced var is being sent, the user can read form the consumed memories;
--! similarly,when a consumed variable is being received the user can write to the produced momory.
--! VAR1_RDY (for consumed vars): signals that the user can safely read from the consumed
--! variable memory. The signal is asserted only after the reception of a correct RP_DAT frame.
--! It is de-asserted after the reception of a correct var1 ID_DAT frame.
--! VAR2_RDY (for broadcast consumed vars): signals that the user can safely read from the
--! consumed broadcast variable memory. The signal is asserted only after the reception of a
--! correct consumed broadcast RP_DAT frame. It is de-asserted after the reception of a correct
--! var2 ID_DAT frame.
--! VAR1_RDY (for consumed vars): signals that the user can safely read from the consumed variable
--! memory or retreive data from the dat_o bus. The signal is asserted only after a consumed var
--! that has been received correctly.
--! It is deasserted after the reception of a correct var1 ID_DAT frame.
--! VAR3_RDY (for produced vars): signals that the user can safely write to the produced variable
--! memory. It is deasserted right after the end of the reception of a correct var3 ID_DAT frame
--! and stays de-asserted until the end of the transmission of the corresponding RP_DAT from
--! nanoFIP.
--! VAR2_RDY (for broadcast consumed vars): signals that the user can safely read from the consumed
--! broadcast variable memory. The signal is asserted only after a broadcast consumed var that has
--! been received correctly.
--! It is deasserted after the reception of a correct var2 ID_DAT frame.
--! Stand-alone Mode:
--! In stand-alone mode, since the DAT_O bus is the same for consumed and consumed broadcast
--! variables, only one of the VAR1_RDY and VAR2_RDY can be enabled at a time.
--! VAR3_RDY remains independant.
--! VAR3_RDY (for produced vars): signals that the user can safely write to the produced variable
--! memory. It is deasserted right after the end of the reception of a correct var3 id_dat and
--! stays deasserted until the end of the transmission of the corresponding rp_dat from nanoFIP
--! (in detail, it stays deasserted until the end of the transmission of the
--! rp_dat.data field and is enabled during the rp_dat.fcs and rp_dat.fes transmission.
--! VAR1_RDY (for consumed vars): signals that the user can safely retreive data from the DAT_O
--! bus. The signal is asserted only after the reception of a correct RP_DAT frame.
--! It is de-asserted after the reception of a correct var1 or var2 ID_DAT frame.
--! Note: in memory mode, since the three memories (consumed, consumed broadcast, produced) are
--! independant, when a produced var is being sent, the user can read form the consumed memories;
--! similarly,when a consumed variable is being received the user can write to the produced momory.
--! In stand-alone mode, since the DAT_O bus is the same for consumed and consumed broadcast
--! variables, only one of the VAR1_RDY and VAR2_RDY can be enabled at a time.
--! VAR3_RDY remains independant.
--! VAR2_RDY (for broadcast consumed vars): signals that the user can safely retreive data from
--! the DAT_O bus. The signal is asserted only after the reception of a correct consumed
--! broadcast RP_DAT frame. It is deasserted after the reception of a correct var2 or var_1
--! ID_DAT frame.
--! VAR3_RDY (for produced vars): signals that the user can safely access the DAT_I bus
--! (same treatment as in memory mode).
VAR_RDY_Generation: process(uclk_i)
......@@ -154,50 +179,59 @@ signal s_rst_nFIP_and_FD, s_assert_RSTON : std_logic;
when var_1 => -- nanoFIP consuming
--------------------
var1_rdy_o <= '0'; -- while consuming VAR1_RDY is 0
var3_rdy_o <= '1'; -- VAR3_RDY independant of var1
var2_rdy_o <= s_var2_received; -- VAR2_RDY enabled only after a valid var2
-- frame reception
var1_rdy_o <= '0'; -- while consuming a var1, VAR1_RDY is 0
var3_rdy_o <= '1'; -- VAR3_RDY is independant of var1
if slone_i = '0' then
var2_rdy_o <= s_var2_received; -- in memory mode VAR2_RDY retains its value
else
var2_rdy_o <= '0'; -- in slone VAR2_RDY is de-asserted (bc of the
s_var2_received <= '0'; -- reception of a valid ID_DAT frame for a var1)
end if;
-- -- -- -- -- -- -- -- -- -- --
if cons_frame_ok_p_d1 = '1' then
-- only if the received rp_dat frame is correct,
s_var1_received <= '1'; -- the nanoFIP signals the user to retreive data
-- note: the signal s_var1_received stays asserted
-- even after the end of the rx_CRC_FES_ok_p_i pulse
if slone_i = '1' then
s_var2_received <= '0'; -- in slone mode, only one of the VAR1_RDY,
end if; -- VAR2_RDY can be enabled at a time
if cons_frame_ok_p_d1 = '1' then -- only if the received RP_DAT frame is correct,
-- the nanoFIP signals the user to retreive data
s_var1_received <= '1'; -- note:the signal s_var1_received remains asser-
-- ted after the end of the cons_frame_ok_p pulse
end if;
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
when var_2 => -- nanoFIP consuming broadcast
------------------------------
var2_rdy_o <= '0'; -- while consuming broadcast VAR2_RDY is 0
var3_rdy_o <= '1'; -- VAR3_RDY independant of var1
var1_rdy_o <= s_var1_received; -- VAR1_RDY enabled only after a valid var1
-- frame reception
if cons_frame_ok_p_d1 = '1' then
-- only if the received rp_dat frame is correct,
s_var2_received <= '1'; -- the nanoFIP signals the user to retreive data
-- note: the signal s_var2_received stays asserted
-- even after the end of the rx_CRC_FES_ok_p_i pulse
if slone_i = '1' then
s_var1_received <= '0'; -- in slone mode, only one of the VAR1_RDY,
end if; -- VAR2_RDY can be enable at a time
when var_2 => -- nanoFIP consuming broadcast
------------------------------
var2_rdy_o <= '0'; -- while consuming a var2, VAR2_RDY is 0
var3_rdy_o <= '1'; -- VAR3_RDY independant of var2
if slone_i = '0' then
var1_rdy_o <= s_var1_received; -- in memory mode VAR1_RDY retains its value
else
var1_rdy_o <= '0'; -- in slone VAR1_RDY is de-asserted (bc of the
s_var1_received <= '0'; -- reception of a valid ID_DAT frame for a var2)
end if;
if cons_frame_ok_p_d1 = '1' then -- only if the received RP_DAT frame is correct,
-- the nanoFIP signals the user to retreive data
s_var2_received <= '1'; -- note:the signal s_var2_received remains asser-
-- ted after the end of the cons_frame_ok_p pulse
end if;
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
when var_3 => -- nanoFIP producing
--------------------
var3_rdy_o <= '0'; -- while producing VAR3_RDY is 0
when var_3 => -- nanoFIP producing
--------------------
var3_rdy_o <= '0'; -- while producing VAR3_RDY is 0
var1_rdy_o <= s_var1_received;
var2_rdy_o <= s_var2_received;
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
when others =>
var1_rdy_o <= s_var1_received;
......@@ -230,7 +264,7 @@ Cons_frame_ok_p_delay: process(uclk_i)
---------------------------------------------------------------------------------------------------
--!@ brief: Generation of the signals s_rst_nFIP_and_FD: signals that the 1st byte of a consumed
--! reset var contains the station address
--! and s_assert_RSTON: signals that the 2nd byte of a consumed
--! and s_assert_RSTON: signals that the 2nd byte of a consumed
--! reset var contains the station address
Reset_Signals: process (uclk_i)
......@@ -239,7 +273,7 @@ Reset_Signals: process (uclk_i)
if nFIP_urst_i = '1' then
s_rst_nFIP_and_FD <= '0';
s_assert_RSTON <= '0';
s_assert_RSTON <= '0';
else
......@@ -248,15 +282,15 @@ Reset_Signals: process (uclk_i)
if rx_var_rst_byte_1_i = subs_i then
s_rst_nFIP_and_FD <= '1'; -- rst_nFIP_and_FD_o stays asserted until
end if; -- the end of the current rp_dat frame
end if; -- the end of the current RP_DAT frame
if rx_var_rst_byte_2_i = subs_i then
s_assert_RSTON <= '1'; -- assert_RSTON_o stays asserted until
end if; -- the end of the current rp_dat frame
s_assert_RSTON <= '1'; -- assert_RSTON_o stays asserted until
end if; -- the end of the current RP_DAT frame
else
s_rst_nFIP_and_FD <= '0';
s_assert_RSTON <= '0';
s_rst_nFIP_and_FD <= '0';
s_assert_RSTON <= '0';
end if;
end if;
end if;
......@@ -264,11 +298,11 @@ Reset_Signals: process (uclk_i)
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
rst_nFIP_and_FD_p_o <= '1' when s_rst_nFIP_and_FD = '1' and cons_frame_ok_p_d1= '1'
else '0';
else '0';
assert_RSTON_p_o <= '1' when s_assert_RSTON = '1' and cons_frame_ok_p_d1= '1'
else '0';
assert_RSTON_p_o <= '1' when s_assert_RSTON = '1' and cons_frame_ok_p_d1= '1'
else '0';
end architecture rtl;
......
wf_cons_bytes_from_rx.vhd
View file @ 24c51736
......@@ -381,8 +381,8 @@ end process;
else "00000000" & s_mem_data_out;
---------------------------------------------------------------------------------------------------
--!@brief synchronous process Buffer_Ctrl_PDU_Length_bytes: Storage of the rp_dat.Control, PDU_TYPE
--! and Length bytes of an incoming rp_dat frame. The bytes are sent to the WF_VAR_RDY_generator
--!@brief synchronous process Buffer_Ctrl_PDU_Length_bytes: Storage of the RP_DAT.Control, PDU_TYPE
--! and Length bytes of an incoming RP_DAT frame. The bytes are sent to the WF_VAR_RDY_generator
--! unit that accordingly enables or not the signals VAR1_RDY, VAR2_RDY.
Buffer_Ctrl_PDU_Length_bytes: process (uclk_i)
......
wf_cons_frame_validator.vhd
View file @ 24c51736
......@@ -21,7 +21,7 @@ use work.WF_PACKAGE.all; --! definitions of supplemental types, subtypes, c
---------------------------------------------------------------------------------------------------
--
--
--! @brief Validation of a received rp_dat frame with respect to: Ctrl, PDU, Length bytes as
--! @brief Validation of a received RP_DAT frame with respect to: Ctrl, PDU, Length bytes as
--! well as CRC and FSS, FES and code violations.
--
--
......@@ -96,7 +96,7 @@ signal s_rx_ctrl_byte_ok, s_rx_PDU_byte_ok, s_rx_length_byte_ok : std_logic;
begin
---------------------------------------------------------------------------------------------------
--!@brief Combinatorial process Consumed_Frame_Validator: validation of an rp_dat
--!@brief Combinatorial process Consumed_Frame_Validator: validation of an RP_DAT
--! frame with respect to: Ctrl, PDU, Length bytes as well as CRC and FSS, FES and code violations.
Consumed_Frame_Validator: process ( var_i, rx_FSS_CRC_FES_viol_ok_p_i, rx_byte_index_i, rx_PDU_byte_i,
......@@ -120,7 +120,7 @@ signal s_rx_ctrl_byte_ok, s_rx_PDU_byte_ok, s_rx_length_byte_ok : std_logic;
end if;
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
if rx_FSS_CRC_FES_viol_ok_p_i = '1' then -- checking the rp_dat.Data.Length
if rx_FSS_CRC_FES_viol_ok_p_i = '1' then -- checking the RP_DAT.Data.Length
-- byte, when the end of frame
-- arrives correctly
if rx_byte_index_i = (unsigned(rx_Length_byte_i) + 5) then -- rx_byte_index starts counting
......
wf_engine_control.vhd
View file @ 24c51736
......@@ -56,10 +56,11 @@ use work.WF_PACKAGE.all;
--! \n\n<b>Last changes:</b>\n
--! 07/2009 v0.01 EB First version \n
--! 08/2010 v0.02 EG E0 added as broadcast \n
--! PDU,length,ctrl bytes of rp_dat checked bf VAR1_RDY/ var_2_rdy assertion
--! if id_dat>8 bytes or rp_dat>134 (bf reception of a FES) go to idle
--! state consume_wait_FSS, for the correct use of the silence time(time not
--! counting when an rp_dat frame has started)
--! PDU,length,ctrl bytes of RP_DAT checked bf VAR1_RDY/ var_2_rdy assertion
--! if ID_DAT>8 bytes or RP_DAT>134 (bf reception of a FES) go to idle
--! state consume_wait_FSS, for the correct use of the silence time(time
--! stops counting when an RP_DAT frame has started)
--! removed check on slone mode for #bytes>4
--
---------------------------------------------------------------------------------------------------
--
......@@ -118,8 +119,8 @@ entity WF_engine_control is
tx_start_produce_p_o : out std_logic;
-- Output to WF_rx
rst_rx_unit_p_o : out std_logic;--! if an FES has not arrived after 8 bytes of an id_dat,
--! or after 134 bytes of an rp_dat, the state machine
rst_rx_unit_p_o : out std_logic;--! if an FES has not arrived after 8 bytes of an ID_DAT,
--! or after 134 bytes of an RP_DAT, the state machine
--! of the WF_rx unit returns to idle state
-- Output to WF_concumed_vars and WF_prod_bytes_to_tx
......@@ -302,11 +303,11 @@ begin
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
when consume_wait_FSS =>
if rx_FSS_received_p_i = '1' then
if rx_FSS_received_p_i = '1' then
nx_control_st <= consume;
elsif s_time_c_is_zero = '1' then
nx_control_st <= idle;
elsif s_time_c_is_zero = '1' then -- if no consumed RP_DAT frame arrives after the
nx_control_st <= idle; -- silence time, the engine goes back to idle state
else
nx_control_st <= consume_wait_FSS;
......@@ -316,12 +317,11 @@ begin
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
when consume =>
if (rx_CRC_FES_ok_p_i = '1') or -- if the rp_dat frame finishes as
(s_rx_bytes_c > 130 and slone_i = '0') or -- expected with a FES, or if no rp_dat
(s_rx_bytes_c > 4 and slone_i = '1') then -- arrives after the silence_time, or
-- if no FES has arrived after the max
-- number of bytes expected, the engine
nx_control_st <= idle; -- goes back to idle state
if (rx_CRC_FES_ok_p_i = '1') or -- if the RP_DAT frame finishes as
(s_rx_bytes_c > 130) then -- expected with a FES,
-- or if no FES has arrived after the max
-- number of bytes expected, the engine
nx_control_st <= idle; -- goes back to idle state.
else
nx_control_st <= consume;
......@@ -483,33 +483,33 @@ begin
---------------------------------------------------------------------------------------------------
Cons_Frame_Validator: WF_cons_frame_validator
port map(
rx_Ctrl_byte_i => rx_Ctrl_byte_i,
rx_PDU_byte_i => rx_PDU_byte_i,
rx_Length_byte_i => rx_Length_byte_i,
rx_Ctrl_byte_i => rx_Ctrl_byte_i,
rx_PDU_byte_i => rx_PDU_byte_i,
rx_Length_byte_i => rx_Length_byte_i,
rx_FSS_CRC_FES_viol_ok_p_i => rx_CRC_FES_ok_p_i,
var_i => s_var,
rx_byte_index_i => s_rx_bytes_c,
-------------------------------------------
cons_frame_ok_p_o => s_cons_frame_ok_p
-------------------------------------------
var_i => s_var,
rx_byte_index_i => s_rx_bytes_c,
------------------------------------------------
cons_frame_ok_p_o => s_cons_frame_ok_p
------------------------------------------------
);
---------------------------------------------------------------------------------------------------
VAR_RDY_Signals_Generation: WF_VAR_RDY_generator
port map (
uclk_i => uclk_i,
slone_i => slone_i,
subs_i => subs_i,
nFIP_urst_i => nFIP_urst_i,
cons_frame_ok_p_i => s_cons_frame_ok_p,
var_i => s_var,
rx_var_rst_byte_1_i => rx_var_rst_byte_1_i,
rx_var_rst_byte_2_i => rx_var_rst_byte_2_i,
---------------------------------------
var1_rdy_o => var1_rdy_o,
var2_rdy_o => var2_rdy_o,
var3_rdy_o => var3_rdy_o,
assert_RSTON_p_o => assert_RSTON_p_o,
uclk_i => uclk_i,
slone_i => slone_i,
subs_i => subs_i,
nFIP_urst_i => nFIP_urst_i,
cons_frame_ok_p_i => s_cons_frame_ok_p,
var_i => s_var,
rx_var_rst_byte_1_i => rx_var_rst_byte_1_i,
rx_var_rst_byte_2_i => rx_var_rst_byte_2_i,
--------------------------------------------
var1_rdy_o => var1_rdy_o,
var2_rdy_o => var2_rdy_o,
var3_rdy_o => var3_rdy_o,
assert_RSTON_p_o => assert_RSTON_p_o,
rst_nFIP_and_FD_p_o => rst_nFIP_and_FD_p_o
---------------------------------------
);
......@@ -534,12 +534,12 @@ begin
Tx_Bytes_Counter: WF_incr_counter
generic map(counter_length => 8)
port map(
uclk_i => uclk_i,
nFIP_urst_i => nFIP_urst_i,
uclk_i => uclk_i,
nFIP_urst_i => nFIP_urst_i,
reinit_counter_i => s_rst_tx_bytes_counter,
incr_counter_i => s_inc_tx_bytes_counter,
incr_counter_i => s_inc_tx_bytes_counter,
---------------------------------------------
counter_o => s_tx_bytes_c
counter_o => s_tx_bytes_c
---------------------------------------------
);
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
......@@ -572,8 +572,8 @@ begin
elsif s_producing = '1' then
s_rst_tx_bytes_counter <= '0';
s_inc_tx_bytes_counter <= tx_request_byte_p_i;
s_tx_byte_index <= std_logic_vector (resize(s_tx_bytes_c, s_tx_byte_index'length));
s_inc_tx_bytes_counter <= tx_request_byte_p_i;
s_tx_byte_index <= std_logic_vector (resize(s_tx_bytes_c, s_tx_byte_index'length));
s_rst_rx_bytes_counter <= '1';
s_inc_rx_bytes_counter <= '0';
......@@ -585,7 +585,7 @@ begin
s_rx_byte_index <= (others => '0');
s_rst_tx_bytes_counter <= '1';
s_inc_tx_bytes_counter <= '0';
s_tx_byte_index <= (others => '0');
s_tx_byte_index <= (others => '0');
end if;
end process;
......@@ -655,7 +655,7 @@ Response_and_Silence_Time_Counter: WF_decr_counter
--! s_var_id: is constantly following the incoming byte rx_byte_i
--! s_var_aux: locks to the value of s_var_id when the ID_DAT.Identifier.Variable byte
--! is received (s_load_var_aux = 1)
--! s_var: locks to the value of s_var_aux at the end of the id_dat frame (s_load_var = 1) if the
--! s_var: locks to the value of s_var_aux at the end of the ID_DAT frame (s_load_var = 1) if the
--! specified station address matches the SUBS configuration.
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
......@@ -702,7 +702,7 @@ Response_and_Silence_Time_Counter: WF_decr_counter
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
var_o <= s_var; -- var_o takes a value at the end of the id_dat
var_o <= s_var; -- var_o takes a value at the end of the ID_DAT
---------------------------------------------------------------------------------------------------
--!@brief: Combinatorial process Var_Characteristics: managment of the signals
......@@ -741,17 +741,17 @@ Response_and_Silence_Time_Counter: WF_decr_counter
begin
if rising_edge(uclk_i) then
if nFIP_urst_i = '1' then
tx_last_byte_p_o <= '0';
s_tx_last_byte_p_d <= '0';
s_tx_byte_ready_p_d1 <= '0';
s_tx_byte_ready_p_d2 <= '0';
s_tx_start_prod_p <= '0';
tx_last_byte_p_o <= '0';
s_tx_last_byte_p_d <= '0';
s_tx_byte_ready_p_d1 <= '0';
s_tx_byte_ready_p_d2 <= '0';
s_tx_start_prod_p <= '0';
else
s_tx_last_byte_p_d <= s_tx_last_byte_p;
tx_last_byte_p_o <= s_tx_last_byte_p_d;
s_tx_byte_ready_p_d1 <= s_tx_byte_ready_p;
s_tx_byte_ready_p_d2 <= s_tx_byte_ready_p_d1;
s_tx_last_byte_p_d <= s_tx_last_byte_p;
tx_last_byte_p_o <= s_tx_last_byte_p_d;
s_tx_byte_ready_p_d1 <= s_tx_byte_ready_p;
s_tx_byte_ready_p_d2 <= s_tx_byte_ready_p_d1;
s_tx_start_prod_p <= (s_prod_wait_resp_time and s_time_c_is_zero);
end if;
end if;
......@@ -765,12 +765,12 @@ Response_and_Silence_Time_Counter: WF_decr_counter
tx_byte_ready_p_o <= s_tx_byte_ready_p_d2;
s_tx_last_byte_p <= s_producing and s_tx_data_length_match and tx_request_byte_p_i;
rst_status_bytes_o <= s_producing and s_tx_byte_ready_p_d2 and tx_sending_mps_i;
s_tx_last_byte_p <= s_producing and s_tx_data_length_match and tx_request_byte_p_i;
rst_status_bytes_o <= s_producing and s_tx_byte_ready_p_d2 and tx_sending_mps_i;
rx_byte_ready_p_o <= s_consuming and rx_byte_ready_p_i;
rx_byte_ready_p_o <= s_consuming and rx_byte_ready_p_i;
rst_rx_unit_p_o <= s_idle_state and rx_byte_ready_p_i;
rst_rx_unit_p_o <= s_idle_state and rx_byte_ready_p_i;
---------------------------------------------------------------------------------------------------
......
wf_package.vhd
View file @ 24c51736
......@@ -708,7 +708,7 @@ end component WF_bits_to_txd;
var2_acc_i: in std_logic;
var3_acc_i: in std_logic;
wbclk_i : in std_logic;
dat_i : in std_logic_vector (15 downto 0);
DAT_I : in std_logic_vector (15 downto 0);
adr_i : in std_logic_vector ( 9 downto 0);
rst_i : in std_logic;
stb_i : in std_logic;
......@@ -725,7 +725,7 @@ end component WF_bits_to_txd;
var2_rdy_o: out std_logic;
var3_rdy_o: out std_logic;
ack_o : out std_logic;
dat_o : out std_logic_vector (15 downto 0)
DAT_O : out std_logic_vector (15 downto 0)
);
end component nanofip;
......
wf_prod_bytes_to_tx.vhd
View file @ 24c51736
......@@ -21,9 +21,9 @@ use work.WF_PACKAGE.all; --! definitions of supplemental types, subtypes, c
---------------------------------------------------------------------------------------------------
--
--
--! @brief After an id_dat frame requesting for a variable to be produced, this unit provides
--! @brief After an ID_DAT frame requesting for a variable to be produced, this unit provides
--! to the transmitter (WF_tx) one by one, \n all the bytes of data needed for the
--! rp_dat frame (apart from fss, fcs and fes bytes).
--! RP_DAT frame (apart from FSS, fcs and FES bytes).
--
--
--! @author Pablo Alvarez Sanchez (pablo.alvarez.sanchez@cern.ch)
......@@ -48,7 +48,7 @@ use work.WF_PACKAGE.all; --! definitions of supplemental types, subtypes, c
---------------------------------------------------------------------------------------------------
--
--! \n\n<b>Last changes:</b>\n
--! -> egousiou: subs_i is not sent in the rp_dat frames \n
--! -> egousiou: subs_i is not sent in the RP_DAT frames \n
--! -> egousiou: signal s_wb_we includes the wb_stb_r_edge_p_i \n
--! -> egousiou: signal s_mem_byte was not in sensitivity list in v0.01! by adding it,
--! changes were essential in the timing of the tx (WF_osc, WF_tx,
......@@ -106,19 +106,19 @@ entity WF_prod_bytes_to_tx is
-- Signals from WF_engine_control
var_i : in t_var; --! variable received from id_dat
var_i : in t_var; --! variable received from ID_DAT
data_length_i: in std_logic_vector (7 downto 0); --! # bytes of Conrol&Data fields of rp_dat
-- includes 1 byte for the rp_dat.Control,
-- 1 byte for rp_dat.Data.PDU_type,
-- 1 byte for rp_dat.Data.LENGTH
-- 0-124 bytes of rp_dat.Data,
--1 byte for rp_dat.Data.MPS and optionally
-- 1 byte for rp_dat.Data.nanoFIP_status
data_length_i: in std_logic_vector (7 downto 0); --! # bytes of Conrol&Data fields of RP_DAT
-- includes 1 byte for the RP_DAT.Control,
-- 1 byte for RP_DAT.Data.PDU_type,
-- 1 byte for RP_DAT.Data.LENGTH
-- 0-124 bytes of RP_DAT.Data,
--1 byte for RP_DAT.Data.MPS and optionally
-- 1 byte for RP_DAT.Data.nanoFIP_status
byte_index_i : in std_logic_vector (7 downto 0); --! pointer to message bytes
-- includes rp_dat.Control and rp_dat.Data
-- includes RP_DAT.Control and RP_DAT.Data
var3_rdy_i : in std_logic;
-- Signals from WF_status_bytes_gen
......@@ -201,7 +201,7 @@ architecture rtl of WF_prod_bytes_to_tx is
---------------------------------------------------------------------------------------------------
--!@brief Combinatorial process Bytes_Generation: Generation of bytes for the Control and Data
--! fields of an rp_dat frame:\n If the variable requested in the id_dat is of "produced" type(id/
--! fields of an RP_DAT frame:\n If the variable requested in the ID_DAT is of "produced" type(id/
--! presence/ var3) the process prepares accordingly, one by one, bytes of data to be sent. \n The
--! pointer "byte_index_i" indicates which byte of the frame is to be sent. Some of the bytes are
--! defined in the WF_package, the rest come either from the memory (if slone=0) or from the the
......@@ -220,7 +220,7 @@ architecture rtl of WF_prod_bytes_to_tx is
-- case: presence variable
-- all the bytes for the rp_dat.Control and rp_dat.Data fields of the rp_dat frame to be sent,
-- all the bytes for the RP_DAT.Control and RP_DAT.Data fields of the RP_DAT frame to be sent,
-- are predefined in the c_VARS_ARRAY(0).byte_array matrix
when var_presence =>
......@@ -268,7 +268,7 @@ architecture rtl of WF_prod_bytes_to_tx is
s_base_addr <= c_VARS_ARRAY(c_VAR_3_INDEX).base_addr; --retreival of info for mem base address
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
-- The first (rp_dat.Control) and second (PDU type) bytes to be sent
-- The first (RP_DAT.Control) and second (PDU type) bytes to be sent
-- are predefined in the c_VARS_ARRAY matrix of the WF_package
if unsigned(s_byte_index) <= c_VARS_ARRAY(c_VAR_3_INDEX).array_length then
......@@ -311,7 +311,7 @@ architecture rtl of WF_prod_bytes_to_tx is
s_base_addr <= (others => '0'); -- no access in memory needed
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
-- The first (rp_dat.Control) and second (PDU type) bytes to be sent
-- The first (RP_DAT.Control) and second (PDU type) bytes to be sent
-- are predefined in the c_VARS_ARRAY matrix of the WF_package
if unsigned(s_byte_index) <= c_VARS_ARRAY(c_VAR_3_INDEX).array_length then -- less equal than
......@@ -394,10 +394,10 @@ architecture rtl of WF_prod_bytes_to_tx is
-- width of 15 bytes
s_length <= std_logic_vector (resize((unsigned(data_length_i)-2),byte_o'length));
--signal used for the rp_dat.Data.LENGTH byte
--signal used for the RP_DAT.Data.LENGTH byte
-- it represents the # bytes of user-data
-- (P3_LGTH) plus 1 byte of rp_dat.Data.MPS
-- plus 1 byte of rp_dat.Data.nanoFIP_status,
-- (P3_LGTH) plus 1 byte of RP_DAT.Data.MPS
-- plus 1 byte of RP_DAT.Data.nanoFIP_status,
-- if applicable
......
wf_prod_data_lgth_calc.vhd
View file @ 24c51736
......@@ -22,8 +22,8 @@ use work.WF_PACKAGE.all; --! definitions of supplemental types, subtypes, c
--
--
--! @brief Calculation of the total amount of data bytes that have to be transferreed when a
--! variable is produced (including the rp_dat.Control, rp_dat.Data.mps and
--! rp_dat.Data.nanoFIPstatus bytes)
--! variable is produced (including the RP_DAT.Control, RP_DAT.Data.mps and
--! RP_DAT.Data.nanoFIPstatus bytes)
--
--
--! @author Pablo Alvarez Sanchez (pablo.alvarez.sanchez@cern.ch)
......@@ -91,8 +91,8 @@ signal s_tx_data_length, s_p3_length_decoded : unsigned(7 downto 0);
begin
---------------------------------------------------------------------------------------------------
--!@brief:Combinatorial process data_length_calcul: calculation of the total amount of data
--! bytes that have to be transferreed when a variable is produced, including the rp_dat.Control as
--! well as the rp_dat.Data.mps and rp_dat.Data.nanoFIPstatus bytes. In the case of the presence
--! bytes that have to be transferreed when a variable is produced, including the RP_DAT.Control as
--! well as the RP_DAT.Data.mps and RP_DAT.Data.nanoFIPstatus bytes. In the case of the presence
--! and the identification variables, the data length is predefined in the WF_package.
--! In the case of a var_3 the inputs slone, nostat and p3_lgth[] are accounted for the calculation.
......@@ -122,14 +122,14 @@ signal s_tx_data_length, s_p3_length_decoded : unsigned(7 downto 0);
-- data length calculation according to the operational mode (memory or stand-alone)
-- in slone mode 2 bytes of user-data are produced
-- to these there should be added: 1 byte rp_dat.Control
-- to these there should be added: 1 byte RP_DAT.Control
-- 1 byte PDU
-- 1 byte Length
-- 1 byte MPS
-- optionally 1 byte nFIP status
-- in memory mode the signal "s_p3_length_decoded" indicates the amount of user-data
-- to these, there should be added 1 byte rp_dat.Control
-- to these, there should be added 1 byte RP_DAT.Control
-- 1 byte PDU
-- 1 byte Length
-- 1 byte MPS
......
wf_reset_unit.vhd
View file @ 24c51736
......@@ -147,11 +147,11 @@ end process;
--!@brief Synchronous process Reset_Outputs: definitions of the three reset outputs:
--! rston_o: user interface reset, active low; active when a reset variable is received and the 2nd
--! byte contains the station address.
--! The signal reset_RSTON stays asserted until the end of the transmission of the rp_dat frame
--! The signal reset_RSTON stays asserted until the end of the transmission of the RP_DAT frame
--! nFIP_rst_o: nanoFIP internal reset, active high;active when rstin is active or when a reset variable
--! is received and the 1st byte contains the station address.
--!The signal reset_nFIP_and_FD stays asserted until the end of the transmission of the rp_dat frame
--!The signal reset_nFIP_and_FD stays asserted until the end of the transmission of the RP_DAT frame
--! fd_rstn_o: fieldrive reset, active low; active when a reset variable is received and the 1st
--! byte contains the station address.
......
wf_rx.vhd
View file @ 24c51736
......@@ -179,8 +179,8 @@ architecture rtl of WF_rx is
--! combinatorial process to manage the output signals), which are the three processes that follow.
--! The unit, is firstly following the input data stream for monitoring the preamble field, and
--! then switches to following the deglitched signal for the rest of the data. It is responsible
--! for the detection of the the preamble, FSS and FES of a received id_dat or consumed
--! rp_dat frame, as well as for the formation of bytes of data.
--! for the detection of the the preamble, FSS and FES of a received ID_DAT or consumed
--! RP_DAT frame, as well as for the formation of bytes of data.
--! The main outputs of the unit (byte_o and byte_ready_p_o) are the main inputs of the unit
--! WF_cons_bytes_from_rx.
......
wf_slone_DATI_bytes_sampler.vhd
View file @ 24c51736
......@@ -77,7 +77,7 @@ entity WF_slone_DATI_bytes_sampler is
var3_rdy_i : in std_logic;
byte_index_i : in std_logic_vector (7 downto 0); --! pointer to message bytes
-- includes rp_dat.Control and rp_dat.Data
-- includes RP_DAT.Control and RP_DAT.Data
-- OUTPUTS
-- Signal to WF_prod_bytes_to_tx
......
wf_status_bytes_gen.vhd
View file @ 24c51736
......@@ -55,6 +55,7 @@ use work.WF_PACKAGE.all; --! definitions of supplemental types, subtypes, c
--! 07/07/2009 v0.01 EB First version \n
--! 08/2010 v0.02 EG code violation & CRC errors considered
--! only during a concumed var reception
--! extended var_rdy
--!
--
---------------------------------------------------------------------------------------------------
......@@ -113,7 +114,9 @@ end entity WF_status_bytes_gen;
--=================================================================================================
architecture rtl of WF_status_bytes_gen is
signal s_refreshment : std_logic;
signal s_refreshment, s_VAR1_RDY_incr_c, s_VAR1_RDY_extended : std_logic;
signal s_VAR2_RDY_incr_c, s_VAR2_RDY_extended, s_VAR3_RDY_incr_c, s_VAR3_RDY_extended : std_logic;
signal s_VAR1_RDY_c, s_VAR2_RDY_c, s_VAR3_RDY_c : unsigned (3 downto 0);
--=================================================================================================
......@@ -126,22 +129,24 @@ begin
--! @brief Synchronous process Status_byte_Formation: Formation of the nanoFIP status byte
--! according to the definitions in Table 8 of specs.
status_byte_formation: process(uclk_i)
nFIP_status_byte_generation: process(uclk_i)
begin
if rising_edge(uclk_i) then
if ((nFIP_urst_i = '1') or (rst_status_bytes_i = '1')) then -- the byte is reinitialized
nFIP_status_byte_o <= (others => '0'); -- after having been delivered
if ((nFIP_urst_i = '1') or (rst_status_bytes_i = '1')) then -- bytes reinitialized
nFIP_status_byte_o <= (others => '0'); -- after having been delivered
else
if ((var1_rdy_i = '0' and var1_acc_i = '1') or -- since the last time the status
(var2_rdy_i = '0' and var2_acc_i = '1')) then -- byte was delivered,
nFIP_status_byte_o(c_U_CACER_INDEX) <= '1'; -- the user logic accessed a cosmd
if ((s_VAR1_RDY_extended = '0' and var1_acc_i = '1') or -- since the last time the status
(s_VAR2_RDY_extended = '0' and var2_acc_i = '1')) then -- byte was delivered,
nFIP_status_byte_o(c_U_CACER_INDEX) <= '1'; -- the user logic accessed a cosmd
end if; -- variable when it was not ready
if ((var3_rdy_i = '0') and (var3_acc_i = '1')) then -- since the last time the status
if (s_VAR3_RDY_extended = '0' and var3_acc_i = '1') then -- since the last time the status
nFIP_status_byte_o(c_U_PACER_INDEX) <= '1'; -- byte was delivered,
end if; -- the user logic accessed a prod
-- variable when it was not ready
......@@ -151,7 +156,7 @@ begin
-- byte was delivered,
end if; -- a consumed var arrived for
-- this station with a manch. code
-- violation (on the rp_dat.Data)
-- violation (on the RP_DAT.Data)
if ((var_i = var_1 or var_i = var_2)and(crc_wrong_p_i = '1')) then
nFIP_status_byte_o(c_R_FCSER_INDEX) <= '1'; -- since the last time the status
......@@ -172,6 +177,60 @@ begin
end if;
end process;
---------------------------------------------------------------------------------------------------
--!@brief Synchronous process
Extend_VAR1_RDY: WF_incr_counter
generic map (counter_length => 4)
port map(
uclk_i => uclk_i,
nFIP_urst_i => nFIP_urst_i,
reinit_counter_i => VAR1_RDY_i,
incr_counter_i => s_VAR1_RDY_incr_c,
counter_o => s_VAR1_RDY_c,
counter_is_full_o => open);
s_VAR1_RDY_incr_c <= '1' when s_VAR1_RDY_c < "1111"
else '0';
s_VAR1_RDY_extended <= '1' when VAR1_RDY_i= '1' or s_VAR1_RDY_incr_c = '1'
else '0';
---------------------------------------------------------------------------------------------------
Extend_VAR2_RDY: WF_incr_counter
generic map (counter_length => 4)
port map(
uclk_i => uclk_i,
nFIP_urst_i => nFIP_urst_i,
reinit_counter_i => VAR2_RDY_i,
incr_counter_i => s_VAR2_RDY_incr_c,
counter_o => s_VAR2_RDY_c,
counter_is_full_o => open);
s_VAR2_RDY_incr_c <= '1' when s_VAR1_RDY_c < "1111"
else '0';
s_VAR2_RDY_extended <= '1' when VAR2_RDY_i= '1' or s_VAR2_RDY_incr_c = '1'
else '0';
---------------------------------------------------------------------------------------------------
Extend_VAR3_RDY: WF_incr_counter
generic map (counter_length => 4)
port map(
uclk_i => uclk_i,
nFIP_urst_i => nFIP_urst_i,
reinit_counter_i => VAR3_RDY_i,
incr_counter_i => s_VAR3_RDY_incr_c,
counter_o => s_VAR3_RDY_c,
counter_is_full_o => open);
s_VAR3_RDY_incr_c <= '1' when s_VAR3_RDY_c < "1111"
else '0';
s_VAR3_RDY_extended <= '1' when VAR3_RDY_i= '1' or s_VAR3_RDY_incr_c = '1'
else '0';
---------------------------------------------------------------------------------------------------
--!@brief Synchronous process Refreshment_bit_Formation: Formation of the refreshment bit (used in
......@@ -183,7 +242,7 @@ end process;
if rising_edge(uclk_i) then
if nFIP_urst_i = '1' or rst_status_bytes_i = '1' then -- the bit is reinitialized
s_refreshment <= '0'; -- after having been delivered
s_refreshment <= '0'; -- after having been delivered
else
if (var3_acc_i = '1') then -- indication that the memory has been accessed
......@@ -209,8 +268,9 @@ end process;
else
mps_status_byte_o <= (others => '0');
mps_status_byte_o (c_REFRESHMENT_INDEX) <= s_refreshment;
mps_status_byte_o (7 downto 3) <= (others => '0');
mps_status_byte_o (c_REFRESHMENT_INDEX) <= s_refreshment;
mps_status_byte_o (1) <= '0';
mps_status_byte_o (c_SIGNIFICANCE_INDEX) <= s_refreshment;
end if;
end process;
......
wf_tx.vhd
View file @ 24c51736
......@@ -79,7 +79,7 @@ entity WF_tx is
-- Signals from the WF_engine_control
start_produce_p_i : in std_logic; --! indication that WF_engine_control is in prod_watchdog state
-- a correct id_dat asking for a produced var has been
-- a correct ID_DAT asking for a produced var has been
-- received and ............
byte_ready_p_i : in std_logic; --! indication that a byte is ready to be delivered
......
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