... | @@ -4,55 +4,17 @@ The MasterFIP project has been organized in work packages. |
... | @@ -4,55 +4,17 @@ The MasterFIP project has been organized in work packages. |
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The description of each package along with its status is described in
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The description of each package along with its status is described in
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the following table:
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the following table:
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<table>
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|**Work Package**|**Description**|**Status**|
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<tbody>
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|----|----|----|
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<tr class="odd">
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|[WP1](WP1)|**Scope, objectives, resources, budget** definition; evaluation of the **Strukton solution**|[Done](https://www.ohwr.org/project/masterfip/uploads/d2e6fadb19f962b82f93972daf1f06b8/masterFIP_technical_choice.pdf)|
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<td><strong>Work Package</strong></td>
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|[WP2](WP2)|**Functional specification** drafting|[Done](https://www.ohwr.org//edms.cern.ch/ui/#!master/navigator/document?d:1938176066:1938176066:subdocs)|
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<td><strong>Description</strong></td>
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|[WP3](WP3)|**Gateware**: writing of VHDL code or extending Strukton code|[Done](https://www.ohwr.org/project/masterfip-gw/wiki)|
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<td><strong>Status</strong></td>
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|[WP4](WP4)|**Gateware testing**: VHDL Testbench|In progress|
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</tr>
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|[WP5](WP5)|**Hardware**: design FMC mezzanine|[Done](https://www.ohwr.org/project/fmc-masterfip/wiki)|
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<tr class="even">
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|[WP6](WP6)|**Hardware testing**: Production test Suite of the FMC mezzanine|[Done](https://www.ohwr.org/project/masterfip-tst/wiki)|
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<td>[WP1](WP1)</td>
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|[WP7](WP7)|**Software**: writing of drivers/ libraries; evaluation of the **Strukton solution**|[Done](https://www.ohwr.org/project/masterfip-sw/wiki)|
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<td><strong>Scope, objectives, resources, budget</strong> definition; evaluation of the <strong>Strukton solution</strong></td>
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|[WP8](WP8)|**Testing**: testing of the combined hardware, gateware, software|In progress|
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<td>[Done](https://www.ohwr.org/project/masterfip/uploads/d2e6fadb19f962b82f93972daf1f06b8/masterFIP_technical_choice.pdf)</td>
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</tr>
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<tr class="odd">
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<td>[WP2](WP2)</td>
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<td><strong>Functional specification</strong> drafting</td>
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<td>[Done](https://www.ohwr.org//edms.cern.ch/ui/#!master/navigator/document?d:1938176066:1938176066:subdocs)</td>
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</tr>
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<tr class="even">
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<td>[WP3](WP3)</td>
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<td><strong>Gateware</strong>: writing of VHDL code or extending Strukton code</td>
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<td>[Done](https://www.ohwr.org/project/masterfip-gw/wiki)</td>
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</tr>
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<tr class="odd">
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<td>[WP4](WP4)</td>
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<td><strong>Gateware testing</strong>: VHDL Testbench</td>
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<td>In progress</td>
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</tr>
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<tr class="even">
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<td>[WP5](WP5)</td>
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<td><strong>Hardware</strong>: design FMC mezzanine</td>
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<td>[Done](https://www.ohwr.org/project/fmc-masterfip/wiki)</td>
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</tr>
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<tr class="odd">
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<td>[WP6](WP6)</td>
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<td><strong>Hardware testing</strong>: Production test Suite of the FMC mezzanine</td>
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<td>[Done](https://www.ohwr.org/project/masterfip-tst/wiki)</td>
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</tr>
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<tr class="even">
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<td>[WP7](WP7)</td>
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<td><strong>Software</strong>: writing of drivers/ libraries; evaluation of the <strong>Strukton solution</strong></td>
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<td>[Done](https://www.ohwr.org/project/masterfip-sw/wiki)</td>
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</tr>
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<tr class="odd">
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<td>[WP8](WP8)</td>
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<td><strong>Testing</strong>: testing of the combined hardware, gateware, software</td>
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<td>In progress</td>
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</tr>
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</tbody>
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</table>
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-----
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-----
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... | @@ -63,3 +25,4 @@ page](https://www.ohwr.org/project/masterfip/wikis)_ |
... | @@ -63,3 +25,4 @@ page](https://www.ohwr.org/project/masterfip/wikis)_ |
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*E.Gousiou, M.Cattin, January 2015*
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*E.Gousiou, M.Cattin, January 2015*
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