... | @@ -15,7 +15,7 @@ |
... | @@ -15,7 +15,7 @@ |
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and
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and
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[EDA-03098-V4](https://www.ohwr.org//edms.cern.ch/project/EDA-03098)
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[EDA-03098-V4](https://www.ohwr.org//edms.cern.ch/project/EDA-03098)
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boards
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boards
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- **GW**: FPGA v2.0.0 [source
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- **GW**: FPGA v3.0.0 [source
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code](https://www.ohwr.org/project/masterfip-gw/tree/master?utf8=%E2%9C%93&rev=v2.0.0&branch=master&tag=v2.0.0)
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code](https://www.ohwr.org/project/masterfip-gw/tree/master?utf8=%E2%9C%93&rev=v2.0.0&branch=master&tag=v2.0.0)
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and
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and
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[binary](https://www.ohwr.org/5689)
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[binary](https://www.ohwr.org/5689)
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