... | @@ -13,7 +13,10 @@ |
... | @@ -13,7 +13,10 @@ |
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and
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and
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[EDA-03098-V4](https://www.ohwr.org//edms.cern.ch/project/EDA-03098)
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[EDA-03098-V4](https://www.ohwr.org//edms.cern.ch/project/EDA-03098)
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boards
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boards
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- **GW**: FPGA v2.1.0 "source code" and "binary"
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- **GW**: FPGA v2.1.0 [source
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code](https://www.ohwr.org/project/masterfip-gw/tree/master?utf8=%E2%9C%93&rev=eva_urv_dev&branch=eva_urv_dev&tag=)
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and
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[binary](https://www.ohwr.org/project/masterfip/uploads/cf538308934e594a90bf8d46a66bf76a/spec_masterfip_mt_urv_20180531.bin)
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- **SW**: not there yet
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- **SW**: not there yet
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## Comments
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## Comments
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