... | @@ -17,9 +17,10 @@ then type *vers*: |
... | @@ -17,9 +17,10 @@ then type *vers*: |
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FPGA id:0xc000ffee
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FPGA id:0xc000ffee
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RTapp id:MFIP(0x4d464950)
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RTapp id:MFIP(0x4d464950)
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FPGA vers:2.0.0
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FPGA vers:2.0.0
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RTapp vers:1.1.0
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RTapp vers:1.1.1
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lib vers:1.1.0
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lib vers:1.1.4
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RTapp git vers:0x35f83574
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RTapp git vers:0x667a0a09
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lib git vers:0x2d8f6db8
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## Source code
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## Source code
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... | | ... | |