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## Project info
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## Project info
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- Sub-projects:
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- [Hardware](https://www.ohwr.org/project/fmc-masterfip/wiki) :
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Mezzanine board schematic and layout, to be combined with a
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[SPEC](https://www.ohwr.org/project/spec/wiki) carrier
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- [Gateware](https://www.ohwr.org/project/masterfip-gw/wiki) : HDL
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design with [Mock
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Turtle](https://www.ohwr.org/project/mock-turtle/wiki)
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- [Software](https://www.ohwr.org/project/masterfip-sw/wiki) :
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Bare-metal C code running in the FPGA-embedded Mock Turtle CPUs,
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library and tools.
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- [Testing](https://www.ohwr.org/project/masterfip-tst/wiki) :
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Production and functional tests.
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- [Work Packages](WorkPackages)
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- [Work Packages](WorkPackages)
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- [Functional
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- [Functional
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Specification](https://www.ohwr.org//edms.cern.ch/document/1457263)
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Specification](https://www.ohwr.org//edms.cern.ch/document/1457263)
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