Libre-FDATool is a Python package aimed at helping in the analysis and
design of HDL filters from high-level specifications. This Free/Libre
Open Source software supports both VHDL and Verilog code generation and
relies on a collection of Free scientific and EDA tools for providing
advanced features -- simulation, graphics, debugging, etc.
In order to overcome the problems often related with deploying open
design toolchains from the ground up across different host environments,
Libre-FDATool and the associated third-party tools are alternatively
distributed in a customized GNU/Linux development virtual machine image.
This virtualized solution is ready to use right out of the box and can
be easily deployed by only using free software in any mainstream
Operating System (GNU/Linux, Windows, OS-X,
NOTE: Libre-FDATool is in Alpha status and intended for internal
evaluation usage. We are looking for programmers and HDL designers for
helping in the development of the first stable release!!
Python 2.7 and 3.x support
Friendly Graphical User Interface (Qt based)
Automatic VHDL and Verilog synthesizable code generation --
Multiple high-level filter description recipes for LTI systems --
FIR and IIR
Support for different filter realization structures
Built in graphical analysis for both floating point and HDL filter
DSP chain simulation using open source tools -- Icarus Verilog and
First test of concept version, starting the blueprint development process.
Libre-FDATool official KickStart on ICALEPCS 2013 OHW. The alpha version of the application is publicly released under GPLv3 along with a Virtual Appliance intended for fast evaluation and development. The objective is starting to build a community of specialist developers around the application