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GSI Timing Starter Kit
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Last edited by Cesar Prados Feb 06, 2013
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Purpose

The GSI Timing Starter Kit is a functional snapshot of the eventual FAIR timing system, which is under active development. It demonstrates real-time coordination of two front-end equipment controllers. The product consists of a data master (Linux PC) which coordinates events, a timing master which synchronizes clocks (White Rabbit switch), and two front-end equipment controllers (either SPECv4, Exploder, VETAR or SCUv2).

Features

Functionality demonstrated:

  • Clock synchronization of front-end controllers (FEC) using White Rabbit
  • Coordinated, preprogrammed, synchronous event generation by multiple FECs
  • Capturing the timestamp of an incoming signal on a FEC
  • Reading the current time from host systems.

FECs can be controlled via:

  • Etherbone over the timing network
  • PCI express to the host system (using Etherbone)
  • The Etherbone C/C** library API
  • Command-line Etherbone tools
  • Command-line timing scripts

Requirements

To use the GSI Timing Starter Kit you will need:

  • 1x Linux PC with gcc to serve as Data Master (DM)
  • 1x White Rabbit v3 switch
  • 2x Supported FECs (either SPECv4, Exploder, VETAR or SCUv2).
  • SFPs and cables to connect FECs and DM to switch
  • (Optional) JTAG cables suitable for flashing chosen FECs
  • (Optional) Linux host system for SPECv4 cards
  • (Optional) USB boot stick for SCU (x86 linux)

Setup

If your FECs were not preprogrammed with the starter kit, you will need to program their flash. You can use these Prebuilt-images or follow the directions for Building-from-sources. For the Altera-based design (Exploder, VETAR or SCUv2), read how to Flash-an-Altera-device and for the SPEC Flash-a-Xilinx-device.

PCI express-based FECs

To use these FECs, you will either need to setup a host system to communicate over PCI express or control them over the network using the data master. Follow the directions to Configure-a-Data-Master to setup a system which can control FECs over the network. If using a SPECv4 card, you will need to Configure-a-SPEC-host for access using PCI express. If using a SCUv2, you will need to Setup-an-SCU-Bootstick to get the ComExpress board running.

VME-based FECs

To use these FEC, VETAR you will either need to setup a VME system or control them over the network using the data master. Follow the directions to Configure-a-Data-Master to setup a system which can control FECs over the network. The VETAR card is endowed with a Xilinx CPLD, as well as a ALTERA FPGA. Both devices must be flashed/programmed, please check Flash-a-Xilinx-device and Flash-an-Altera-device for more details. For using a VETAR card, you need to Configure-a-VME-host for access using the VME bus.

Stand-Alone FECs

This FEC, EXPLODER, is an autonomous card with multiple I/O possibilities. It doesn't need any system setup.

White Rabbit Console

All FEC devices include a White-Rabbit-Console which you can use to debug the device.

Wishbone Timing devices

The timing starter kit includes three devices for controlling timing. These devices are part of the larger Wishbone memory map as seen in this dump:

BusPath        VendorID         Product   BaseAddress(Hex)  Description
1              0000000000000651:eef0b198                 0  WB4-Bridge-GSI     
1.1            000000000000ce42:66cfeb52                 0  WB4-BlockRAM       
1.2            0000000000000651:eef0b198             20000  WB4-Bridge-GSI     
1.2.1          000000000000ce42:ab28633a             20000  WR-Mini-NIC        
1.2.2          000000000000ce42:650c2d4f             20100  WR-Endpoint        
1.2.3          000000000000ce42:65158dc0             20200  WR-Soft-PLL        
1.2.4          000000000000ce42:de0d8ced             20300  WR-PPS-Generator   
1.2.5          000000000000ce42:ff07fc47             20400  WR-Periph-Syscon   
1.2.6          000000000000ce42:e2d13d04             20500  WR-Periph-UART     
1.2.7          000000000000ce42:779c5443             20600  WR-Periph-1Wire    
1.2.8          0000000000000651:68202b22             20700  Etherbone-Config   
2              0000000000000651:eef0b198            100000  WB4-Bridge-GSI     
2.1            0000000000000651:8752bf44            140000  GSI_ECA_UNIT       
2.2            0000000000000651:10051981            180000  GSI_TM_LATCH       

Using the device WR-PPS-Generator, you can Read-the-current-time from a locked FEC.
Using the device GSI_ECA_UNIT, you can Schedule-events to flip the outputs of the FECs.
Using the device GSI_TM_LATCH, you can Capture-timestamps from inputs on the FECs.

I/O Assignments for the FECs

I/O-assignments for SPEC FMCs and SCU.

TODO

Files

  • timing-diagram.png
Clone repository
  • Building from sources
  • Capture timestamps
  • Configure a data master
  • Configure a spec host
  • Configure a vme host
  • Configure a vme system
  • Documents
  • Flash a xilinx device
  • Flash an altera device
  • Home
  • Io assignments
  • Prebuilt images
  • Read the current time
  • Documents
    • Project attachments
    • Syslinux.cfg
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