Flash a Xilinx FPGA
Connect JTAG to your SPECv4 as
shown:
You must also power the SPEC card either using the 12V DC input on the
top or by inserting it into a system and then turning that system on. Do
not connect the 12V DC input when the card is inserted in a PC!
Given a working bit file (you can use Prebuilt-images), you reprogram the flash of an SPEC using the ISE Impact tool. When you get random dialogues asking for "Ok", just click them if they are not covered here.
- Launch impact
- Double-click "Create PROM File" in the top-left pane
- Select SPI Flash/Single FPGA and click the first green arrow
- Select "32M" as Storage Device and click "Add Storage Device" then the next green arrow
- Enter spec_top for "Output file name" then click "Ok" in the lower-right
- Select the spec_top.bit when asked to add a device. Do not add more.
- In the second pane on the left, double-clik "Generate File"
- Double-click the "Boundary scan" in the top-left pane
- Right-click the new pane with the blue text and click "Initiliaze chain"
- When prompted, select the spec_top.bit.
- Select "Yes" to add a Flash PROM.
- Choose the mcs you generated earlier.
- PROM type is: "SPI PROM", "M25P32", "Data width 1"
- Right-click on the "FLASH" in the main pane and select "Program"
- Click "Ok" and wait for the Flash to be programmed.
Now that your device is flashed, confirm that it working using the White-Rabbit-Console.
Flash a Xilinx CPLD
Connect the Digilent Jtag cable to the card as shown:
Given a working jed file (you can use Prebuilt-images), you program the EEPROM of the CPLD using the ISE iMPACT tool:
- Launch impact
- Click on "Boundary Scan", then "Initialize Chain"
- A window will ask to add a .jed file
- "Erase" the CPLD if it was already programmed, IMPORTANT The CPLD has an internal EEPROM, is a non-volatile memory.
- "Program" the CPLD.
