... | ... | @@ -37,16 +37,21 @@ Now that your device is flashed, confirm that it working using the |
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# Flash a Xilinx CPLD
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Connect the XXX cable to the card as
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shown:
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![](/uploads/c22db64c9a83bbeeac9a29679b3abccf/vetar_jtag.png)
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Connect the Digilent Jtag cable to the card as
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shown:
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![](/uploads/c22db64c9a83bbeeac9a29679b3abccf/vetar_jtag.png)
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Given a working bit file (you can use
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[Prebuilt-images](Prebuilt-images)), you program the EEPROM of the CPLD
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using the ISE Impact tool.
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using the ISE iMPACT tool:
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- Launch impact
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1. Launch impact
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2. Click on "Boundary Scan", then "Initialize Chain"
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3. A window will ask to add a .bit file
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4. "Erase" the CPLD if it was already programmed
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5. "Program" the CPLD.
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-
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*IMPORTANT** The CPLD has an internal EEPROM, is a non-volatile memory,
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remember to erase it before reprogram.
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