... | ... | @@ -37,9 +37,8 @@ Now that your device is flashed, confirm that it working using the |
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# Flash a Xilinx CPLD
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Connect the XXX cable to the card as
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shown:
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![](/uploads/c22db64c9a83bbeeac9a29679b3abccf/vetar_jtag.png)
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Connect the XXX cable to the card as shown:
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vetar\_jtag.jpg
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Given a working bit file (you can use
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[Prebuilt-images](Prebuilt-images)), you program the EEPROM of the CPLD
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using the ISE Impact tool.
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