GBT-based Expandable Front-End (GEFE)
Project description
The Giga Bit Transceiver based Expandable Front-End (GEFE)* is a multi-purpose FPGA-based radiation tolerant card, produced under the CERN Open Hardware License (CERN OHL). It is foreseen to be the new standard FMC carrier for digital front-end applications in the CERN BE-BI group (equivalent to what the VFC-HD is for the back-end applications). Its intended use ranges from fast data acquisition systems to slow control installed close to the beamlines, in a radioactive environment exposed to Total Ionizing Doses (TID) of up to 700 Gy.
The GEFE takes advantage of the Giga Bit Transceiver (GBT)/Versatile Link developed by the CERN PH-ESE group. This provides a rad-hard, high-speed (4.8 Gbps), bidirectional, optical link (named Versatile Link) for communication with back-end electronics, and multiple low-speed (40 at 80 MHz, 20 at 160 MHz or 10 at 320MHz) electrical links (named e-links) for communication with digital front-end electronics. The communication through the GBT/Versatile Link can be fixed and deterministic in clock phase and data latency if required. In addition to the GBT/Versatile Link, the GEFE features a custom Electrical Serial Link Transceiver (ESLT), to be used in low-speed communications over copper cable through long distances (tested up to 2 km at 10 Mbps).
In order to maximize the versatility, the GEFE is expanded with dedicated mezzanine cards through a High-Pin Count FPGA Mezzanine Card (FMC HPC) connector. This feature gives users the possibility of having an application specific digital or mixed-signal system, for interfacing with front-end electronics. For instance, the GEFE could be expanded with an ADC mezzanine card for sampling the analogue signals from a beam position monitor (BPM), or with a mezzanine card featuring a connector for plugging the GEFE onto the backplane of a crate.
The use of an FPGA, coupled with flexible powering, clocking and FPGA programming schemes, provides the capability to adapt the GEFE for interfacing to the user`s systems. Moreover, the variety of optical and electrical interfaces on the board, in addition to its flexible architecture, mean that it can easily be adapted for use in many different applications where radiation tolerance is a requirement.
Main features
- Rad-hard FPGA (Microsemi ProAsic3, A3PE3000-FGG896) (TID up to 750 Gy)
- Features different components of the GBT-Versatile Link ecosystem
from CERN PH-ESE
- VTRx
- GBTx
- SCA ready (SCA ASIC may be mounted on an FMC)
- FEASTMP
- Optical & Electrical serial links:
- One high-speed bidirectional optical link (Versatile Link) (4.8 Gbps)
- One custom low-speed bidirectional electrical link (tested up to 10 Mbps over 2 km of coaxial cable)
- Upgradable:
- Socket for one expansion FMC HPC for user-specific I/Os
Note: High-speed lanes are used as standard user-specific I/Os and for special purposes - Two general purpose 26-pin connectors for user-specific I/Os (13 & 24 user pins respectively)
- Socket for one expansion FMC HPC for user-specific I/Os
- Several general purpose I/O resources (e.g. push button, etc.)
- Flexible schemes for:
- Clocks
- Resets
- FPGA programming
- Slow Control (SC) E-link
- Power
- Small custom form factor (200x100mm)
- 12-layer PCB
Project information
- Official design data EDMS EDA-03168
- GEFE Specifications
- Other documents
GEFE Community
- CERN BE-BI-QP:
- New Multi-Orbit POsition System SPS (MOPOS SPS): Requested 300 pieces
- Advanced Wakefield Experiment BPM (AWAKE BPM): Requested 30 pieces
- CERN BE-BI-PM:
- Motor Controller Optical Interface (MCOI): Requested 25 pieces
- CERN BE-BI-BL:
- Beam Wire Scanners: Interested
- Beam Gas Ionization (BGI) Monitor: Interested
- CERN BE-CO:
- CLIC Acquisition and Control Module (CLIC-ACM): Interested
- New Rad-tol fieldbus devkit: Interested
- CERN TE-EPC:
- Function Generator Controller Lite (FGClite): Interested
- CERN EN-STI:
- CHARM test board: Interested
Contact
- Manoel Barros Marin - CERN
Status
Date | Event |
05-12-2014 | First ideas about the project. |
10-02-2015 | Inclusion of project on OHWR. |
01-03-2015 | Start of schematics design. |
19-06-2015 | First version of PCB layout. |
03-07-2015 | Design review comments received. |
29-07-2015 | Order sent to CERN TS-DEM for fabrication of 2 GEFE v1 prototypes. |
30-09-2015 | Fabrication of the 2 GEFE v1 prototypes finished. |
03-12-2015 | GEFE v1 prototypes test results presentation at CERN BE-BI Technical Board. |
15-01-2016 | Schematics and PCB layout revision for pre-production version (GEFE v2). |
01-02-2016 | Order sent to CERN TS-DEM for fabrication of 2 pre-production GEFE v2 prototypes. |
01-02-2016 | Order sent to CERN TS-DEM for fabrication of 35 pre-production GEFE v2. (to be fabricated after GEFE v2 prototype testing). |
18-04-2016 | Delayed assembly of the 35 GEFE v2 until end of May due to components availability issue. |
Manoel Barros Marin - 01 December 2015