FPGA Configuration Space Specification (also known as SDB)
This project is an effort to introduce a configuration space
specification for internal FPGA buses (interconnects, crossbars). Our
initial target is Wishbone, but the specification is generic. The output
of this project is called SDB (Self Describing Bus) even if the project
(thus the repository) is called fpga-config-space.
SDB allows to enumerate the cores that are live in the current fpga
binary, either from the host computer or from the internal soft-core CPU
in the FPGA itself. It is also used as a simple filesystem in our EEPROM
so data can be easily accessed by both the host and the soft core that
lives in the FPGA itself.
Version 1.1 of SDB the specification is available in PDF
format, together with the header
It has been built from the repository of this project, so you can get
the git tree instead and run Latex on it.
We chose, for the time being, to not describe interrupts. After some
drafts for one such description, Wesley Terpstra
explained why legacy interrupts should be avoided in a SoC design and
MSI-like interrupts don't need an external description.
His complete reasoning is here: Interrupts
The implementation as VHDL is part of the respective projects.
Code for the Linux kernel (both as a bus driver and a file system
driver) is being written. Available code
is part of this repository, but it's still work in progress. Sdbfs is
being used in our EEPROMs using
the user-space tools and library currently in the "sdbfs" subdir of the
Start of project
Added draft of specification (available in Repository section)
Added code for wishbone simulator (source code available in Repository or Files section)
After long discussions, the specification is published
Version 1.1 of the sdb specification, including sdbfs material and more