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VME FMC Carrier VFC
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VME FMC Carrier VFC
Issues
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3
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23
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26
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Missing connection to control the output enable of the VMEP0_LVDSTCLK and VMEP0_LVDSBUNCHCLK
#34
· opened
Oct 20, 2010
by
Andrea Boccardi
bug
CLOSED
2
updated
Feb 12, 2019
Inverted polarity of DDS_OUT LVDS signal
#33
· opened
Oct 20, 2010
by
Andrea Boccardi
bug
CLOSED
1
updated
Feb 12, 2019
Design out RAKON IVT3205CR 25.0 MHz as too difficult to obtain.
#32
· opened
Nov 02, 2010
by
Erik van der Bij
bug
CLOSED
2
updated
Feb 12, 2019
NUMONYX M25P128-VMF6G difficult to find
#31
· opened
Nov 02, 2010
by
Erik van der Bij
bug
CLOSED
1
updated
Feb 12, 2019
Add configuration jumpers to SFPGA's HSWAPEN
#28
· opened
Feb 11, 2011
by
Pablo Alvarez
bug
CLOSED
1
updated
Feb 12, 2019
A 100nF on the Vref of the AD5666 would improve the reference stability
#27
· opened
Feb 15, 2011
by
Andrea Boccardi
bug
CLOSED
1
updated
Feb 12, 2019
Difficulties in soldering the FMC connectors
#25
· opened
Mar 25, 2011
by
Andrea Boccardi
bug
CLOSED
1
updated
Feb 12, 2019
place pull ups and down on the pin modes of the S-FPGA
#24
· opened
Jun 06, 2011
by
Andrea Boccardi
bug
CLOSED
0
updated
Feb 12, 2019
AC couple the SFP
#23
· opened
Jun 06, 2011
by
Andrea Boccardi
bug
CLOSED
1
updated
Feb 12, 2019
Place the VME-ADDR buffers by default in BUS to Carrier direction
#22
· opened
Jun 06, 2011
by
Andrea Boccardi
bug
CLOSED
0
updated
Feb 12, 2019
Replace the on off indication (serigraphy) on the manual address switch with 1 and 0
#21
· opened
Jun 06, 2011
by
Andrea Boccardi
bug
CLOSED
0
updated
Feb 12, 2019
Add a CDR chip optionally connected (AC coupling switch) to one of the 2 SFP
#19
· opened
Jun 06, 2011
by
Andrea Boccardi
bug
CLOSED
1
updated
Feb 12, 2019
Missing RZQ calibration resistor for DDR termination
#18
· opened
Jun 07, 2011
by
Projects
bug
CLOSED
1
updated
Feb 12, 2019
P2 user defined connections
#15
· opened
Jun 14, 2011
by
Andrea Boccardi
bug
CLOSED
1
updated
Feb 12, 2019
[CRITICAL] Tx/Rx pairs swapped in SFP1 and SFP2
#14
· opened
Jun 17, 2011
by
Tomasz Wlostowski
bug
CLOSED
1
updated
Feb 12, 2019
PLL oscillators
#13
· opened
Jun 17, 2011
by
Tomasz Wlostowski
bug
CLOSED
1
updated
Feb 12, 2019
Oscillators for WR
#12
· opened
Jun 17, 2011
by
Tomasz Wlostowski
bug
CLOSED
1
updated
Feb 12, 2019
Programming the system FPGA crashes/reboots the MEN-A20
#11
· opened
Jun 21, 2011
by
Projects
bug
CLOSED
1
updated
Feb 12, 2019
Review inter-FPGA GTP clocking
#10
· opened
Jun 22, 2011
by
Projects
bug
CLOSED
1
updated
Feb 12, 2019
Follow PCB layout guidelines for DDR3 routing.
#9
· opened
Jun 22, 2011
by
Projects
bug
CLOSED
1
updated
Feb 12, 2019
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