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@@ -47,6 +47,59 @@ EDA-02030](https://edms.cern.ch/nav/EDA-02030)
 
 ![](/uploads/475af7589a0519125edf7e59ea0c78d1/VFC_conns.jpg)
 
+-----
+
+## Status
+
+<table>
+<tbody>
+<tr class="odd">
+<td><strong>Date</strong></td>
+<td><b> Event </b></td>
+</tr>
+<tr class="even">
+<td>30-10-2009</td>
+<td>Start of project.</td>
+</tr>
+<tr class="odd">
+<td>24-03-2010</td>
+<td>PCB layout started</td>
+</tr>
+<tr class="even">
+<td>10-05-2010</td>
+<td>Vadj fixed to 2.5V for FMC slot 2 to solve problems with bank power supplies.</td>
+</tr>
+<tr class="odd">
+<td>11-05-2010</td>
+<td>All active components ordered.</td>
+</tr>
+<tr class="even">
+<td>05-07-2010</td>
+<td>PCB layout review held.</td>
+</tr>
+<tr class="odd">
+<td>09-08-2010</td>
+<td>PCB layout good for production.</td>
+</tr>
+<tr class="even">
+<td>01-09-2010</td>
+<td>Simulation started. Many troubles getting connectivity files out of schematics. Redo by hand.</td>
+</tr>
+<tr class="odd">
+<td>23-06-2010</td>
+<td>Layout files received and being reviewed.</td>
+</tr>
+<tr class="even">
+<td>15-09-2010</td>
+<td>PCB being produced at CERN. Expect assembled boards by mid October.</td>
+</tr>
+</tbody>
+</table>
+
+-----
+
+Andrea Boccardi, Erik van der Bij - 15 September 2010
+
 
 
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