FMC cards developed as Open Hardware
FMC Carriers
- Simple PCIe FMC carrier (SPEC). Xilinx Spartan (CERN BE/CO + industry) - Prototypes working. Production started (1/9/11)
- PCI Express Carrier with 1 FMC slot (LPC). Xilinx Spartan (CERN BE/CO, P.Alvarez) - Project on hold (6/5/11)
- VME FMC Carrier with 2 FMC slots (LPC). Xilinx Spartan (CERN BE/BI, A.Boccardi) - V2 being built (1/9/11)
- VME FMC Carrier with 2 FMC slots (HPC). Xilinx Virtex and Sharc DSP (CERN BE/RF, J. Molendijk) - Prototype being fabricated (1/9/11)
FMC Mezzanines
Digital I/O
-
16-channel TTL I/O
(CERN BE/CO, M.Cattin) - prototype produced. Needs redesign for
other connector (15/2/10)
- programmable as 8 in/8 out, 16 in or 16 out.
-
FMC 5-channel Digital I/O
module (CERN BE/CO,
T.Wlostowski) - prototype produced. Needs redesign (1/9/11)
- programmable 5 input/output ports (Lemo 00 connectors)
Analog to Digital Converters
Overview of specifications of CERN developments at FMCAdcProjects.
-
FmcAdc100M14b4cha: 100 MSPS, 14 bits, 4
channel (CERN
BE/CO) - 3 V3 cards produced, firmware being
developed
(9/11)
- Potential users
- BPM Linac4. To be used on VME carrier (CERN BE/BI, L.Soby, M.Sordet, J.Belleman 1st beam end 2010)
- Frame grabber for BSRT emittance meter (CERN BE/BI/PM, A.Boccardi, F.roncarolo, 9/11)
- Septum. To be used in PCIe (CERN TE/ABT, E.Carlier, end 2011)
- OASIS general purpose (Deghaye)
- PSB pick-ups, 64 cards needed on PCIe or VME (Belleman - BE/BI, end 2010)
- CNAO, Italian Hadron Therapy Centre, BPM system (M. Caldara, Oct. 2011)
- Agata experiment (M. Bellato - INFN PH/UCM, August 2010, may require 400 cards)
- Culham Centre for Fusion Energy (G. Naylor - CCFE, Aug 2010)
- Advanced Photon Source, Argonne National Laboratory (A. Pietryla - APS-controls group - Jan 2011)
- Radio Telescope, Oregan State University Topic ADC (Mar 2011)
- Potential users
- FmcAdc100k16b8cha: 100 kSPS, 16 bits, 8 channel (CERN BE/CO) - working prototype, firmware being developed. Needs modifications (August 2011)
- 128 ksps ADC (CERN TE/EPC, Q. King, G. Ramseier) - under design
- 128 kSPS (50 kHz bandwidth) with an ADS1274 Simultaneous Sampling 24-Bit Delta Sigma ADC.
- fixed input range of +/- 11V.
- based on another new design with a DSP, RAM & ADC (ADS1274) combined and a differential serial link.
- The first design is 4-channel, but it may be expanded to 8 channels (ADS1278). - (8/2/10)
- Not clear if this will fit on a single FMC. Most likely a front-end with the ADC in a separate rack will be needed and the FMC will only contain some kind of digital receiver logic. (9/2/10)
- Will use with PCIe carrier.
- User: TE/EPC 64 channels; SVC project (Static Var Compensators, 11x64 signals).
- 125 MSPS, 16 bits, 4 channel ADC (CERN BE/RF,
J.Sanchez)
- 50 Ohm DC-coupled, 70dBFS dynamic range, ENOB ~12, 40MHz analog bandwidth, +/-1V, gain selectable: 0dB/+24dB, thermal offset drift compensation.
- Two low jitter clock inputs and two data clock outputs.
- Design data: EDMS EDA-02068.
- Prototype received (October 2010).
- Needs carrier with HPC connector.
- 2.5 MSPS, 24-bit ADC, 1 channel, +/- 10V input, auto-calibration,
trigger by machine timing (CERN TE/MSC, Giloteaux)
- User: Train-B systems of AD, LEIR, PS, Booster and SPS. End 2010 prototype.
Digital to Analog Converters
- FMC3: 10MSPS, 4 channel, 16 bit, output range +/-10V. - (CERN BE/CO), Project will not start before 2011
- FmcDac4ch16b125MSPS, 4 channel, 16 bit, 125 MSPS DAC (CERN BE/RF,
P.M. Leinonen), schematics ready (April 2010)
- 40 MHz analog BW, AC-coupled, 50 Ohm, 2Vpp or 2Vpp/16 output, 4xSMC, clock generated on MDDS mezzanine output on SMC.
- Needs carrier with HPC connector.
High-performance Time-to-Digital Converter
- FMC6: FMC Time to Digital Converter: 5 channel, 1 ns
resolution (CERN BE/CO),
prototype built, firmware being developed, August 2011.
- Users
- E. Carlier (TE/ABT), 1 ns resolution, may use 16-channel TTL I/O for I/O or NIM input?
- A. Boccardi (BE/BI, Synchrotron light monitor), 50 ps resolution, likely another design requiring other front-end.
- Users
Fine Delay module
-
FMC-Delay-1ns-8cha: 4 channel, 1 ns
resolution (CERN
BE/CO) - 1 Proto built, firmware being developed (August 2011)
- ideas: http://gkasprow.selfip.com/~pkasprow/Creotech/products.pdf (page 5)
- Users
- TE/ABT: Carlier
- CTF3: E.Said (now uses VME board)
Direct Digital Synthesizer
- 0-250 MHz DDS (CERN BE/RF,
J.Sanchez) Proto built
August 2011?)
FMC DDS 250M 2ch- Generates two independent clocks, one 10 MHz reference clock input
- Needs carrier with HPC connector.
- Design EDA-02070
Test cards
- FMC Carrier tester - Mezzanine to test correct mounting of FMC connectors in FMC carrier boards. - proto built (May 2011)
- GLIB - GBT Link Interface Board - AMC carrier
Erik van der Bij - 13 September 2011