... | ... | @@ -89,9 +89,13 @@ Overview of specifications of CERN developments at |
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#### High-performance Time-to-Digital Converter
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- FMC6: To be designed (CERN BE/CO) by July 2010 for TE/ABT
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- ideas: [A 17ps Time-to-Digital Converter Implemented in 65nm
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FPGA Technology, C. Favi, E.
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- ideas
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- [A 17ps Time-to-Digital Converter Implemented in 65nm FPGA
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Technology, C. Favi, E.
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Charbon](http://portal.acm.org/citation.cfm?id=1508145)
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- http://cdsweb.cern.ch/record/989402/files/lhcb-2006-055.pdf
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- http://lhcb-doc.web.cern.ch/lhcb-doc/presentations/conferencetalks/postscript/2006presentations/LECC06Jacobsson.pdf
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(implementation)
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- User: E. Carlier (TE/ABT), 1 ns resolution, may use [16-channel
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TTL I/O](https://www.ohwr.org/project/fmc-dio-16chttla) for I/O
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or NIM input?
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... | ... | @@ -101,6 +105,9 @@ Overview of specifications of CERN developments at |
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#### Fine Delay module
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- FMC7: To be designed (CERN BE/CO) by June 2010 for TE/ABT
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- ideas
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- http://gkasprow.selfip.com/~pkasprow/Creotech/products.pdf
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(page 5)
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- Users: TE/ABT: Carlier, CTF3: E.Said (now uses VME board)
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- 25ns - 100ms, 0.1ns accuracy
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... | ... | @@ -185,7 +192,7 @@ The FMC standard refers to other standards for the EEPROM data: |
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- [A Brief History of FMC (VITA-57), fun
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background](http://atomicrules.blogspot.com/2009/12/brief-history-of-fmc-vita-57.html)
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\-- ErikVanDerBij - 14 April 2010
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\-- ErikVanDerBij - 19 April 2010
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