... | @@ -44,11 +44,14 @@ Overview of specifications of CERN developments at |
... | @@ -44,11 +44,14 @@ Overview of specifications of CERN developments at |
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- [FmcAdc100M14b4cha: 100 MSPS, 14 bits, 4
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- [FmcAdc100M14b4cha: 100 MSPS, 14 bits, 4
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channel](https://www.ohwr.org/project/fmc-adc-100m14b4cha) (CERN
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channel](https://www.ohwr.org/project/fmc-adc-100m14b4cha) (CERN
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BE/CO) - prototype being built
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BE/CO) - prototype being built
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- User: BPM Linac4. To be used on VME carrier (L.Soby, M.Sordet
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- Users
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1st beam end 2010)
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- BPM Linac4. To be used on VME carrier (L.Soby, M.Sordet 1st
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- User: OASIS general purpose (Deghaye)
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beam end 2010)
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- User: PSB pick-ups, 64 cards needed on PCIe or VME (Belleman -
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- OASIS general purpose (Deghaye)
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- PSB pick-ups, 64 cards needed on PCIe or VME (Belleman -
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BE/BI, end 2010)
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BE/BI, end 2010)
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- TERA Hadron therapy, used on specific carrier with USB (N.
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Malakhov - PH/UGC, *alpha tester* June 2010)
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- [FmcAdc100k16b8cha: 100 kSPS, 16 bits, 8
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- [FmcAdc100k16b8cha: 100 kSPS, 16 bits, 8
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channel](https://www.ohwr.org/project/fmc-adc-100k16b8cha) (CERN
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channel](https://www.ohwr.org/project/fmc-adc-100k16b8cha) (CERN
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BE/CO) - being designed
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BE/CO) - being designed
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... | @@ -73,7 +76,7 @@ Overview of specifications of CERN developments at |
... | @@ -73,7 +76,7 @@ Overview of specifications of CERN developments at |
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FMC will only contain some kind of digital receiver logic.
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FMC will only contain some kind of digital receiver logic.
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(9/2/10)
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(9/2/10)
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- Will use with PCIe carrier.
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- Will use with PCIe carrier.
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- Users: TE/EPC 64 channels; SVC project (Static Var Compensators,
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- User: TE/EPC 64 channels; SVC project (Static Var Compensators,
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11x64 signals).
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11x64 signals).
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- 2.5 MSPS, 24-bit ADC, 1 channel, +/- 10V input, auto-calibration,
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- 2.5 MSPS, 24-bit ADC, 1 channel, +/- 10V input, auto-calibration,
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trigger by machine timing (CERN TE/MSC, Giloteaux)
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trigger by machine timing (CERN TE/MSC, Giloteaux)
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... | @@ -85,7 +88,10 @@ Overview of specifications of CERN developments at |
... | @@ -85,7 +88,10 @@ Overview of specifications of CERN developments at |
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- [FMC3: 10MSPS, 4 channel, 16 bit, output range
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- [FMC3: 10MSPS, 4 channel, 16 bit, output range
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+/-10V.](https://www.ohwr.org/project/fmc-dac1) - Project will not
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+/-10V.](https://www.ohwr.org/project/fmc-dac1) - Project will not
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start before 2011
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start before 2011
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- FmcDac4ch16b250MSPS, 4 channel, 16 bit, 250 MSPS (?) DAC
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- FmcDac4ch16b125MSPS, 4 channel, 16 bit, 125 MSPS DAC
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- 40 MHz analog BW, AC-coupled, 50 Ohm, 2Vpp or 2Vpp/16 output,
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4xSMC, clock generated on MDDS mezzanine output on SMC. HPC
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connector (\!)
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- P.M. Leinonen (CERN BE/RF), schematics ready (April 2010)
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- P.M. Leinonen (CERN BE/RF), schematics ready (April 2010)
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#### High-performance Time-to-Digital Converter
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#### High-performance Time-to-Digital Converter
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... | @@ -212,7 +218,7 @@ The FMC standard refers to other standards for the EEPROM data: |
... | @@ -212,7 +218,7 @@ The FMC standard refers to other standards for the EEPROM data: |
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-----
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-----
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Erik van der Bij - 6 May 2010
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Erik van der Bij - 10 May 2010
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