... | @@ -80,8 +80,9 @@ Overview of specifications of CERN developments at |
... | @@ -80,8 +80,9 @@ Overview of specifications of CERN developments at |
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- 125 MSPS, 16 bits, 4 channel ADC (CERN BE/RF, J.Sanchez)
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- 125 MSPS, 16 bits, 4 channel ADC (CERN BE/RF, J.Sanchez)
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- 50 Ohm DC-coupled, 70dBFS dynamic range, 40MHz analog bandwidth,
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- 50 Ohm DC-coupled, 70dBFS dynamic range, ENOB ~12, 40MHz analog
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gain selectable: 0dB/+24dB, thermal offset drift compensation.
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bandwidth, +/-1V, gain selectable: 0dB/+24dB, thermal offset
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drift compensation.
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- two low jitter clock inputs and two data clock outputs.
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- two low jitter clock inputs and two data clock outputs.
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- *Needs carrier with HPC connector.*
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- *Needs carrier with HPC connector.*
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