... | ... | @@ -42,10 +42,6 @@ board](https://www.ohwr.org/project/fmc-masterfip/uploads/8363de65c8dd486f2ecf64 |
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<td>External sync. input</td>
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<td>LEMO 0 connector</td>
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</tr>
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<tr class="odd">
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<td>Diagnostics</td>
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<td>Embedded ADC</td>
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</tr>
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</tbody>
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</table>
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... | ... | @@ -57,13 +53,13 @@ board](https://www.ohwr.org/project/fmc-masterfip/uploads/8363de65c8dd486f2ecf64 |
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[EDMS: EDA-03098](https://edms.cern.ch/project/EDA-03098)
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- Currently supported versions:
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- FmcWorldFIP V1 - Bus speed 31.25k -
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[EDA-03098-V1-0](https://edms.cern.ch/item/EDA-03098-V1-0)
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[EDA-03098-V3-0](https://edms.cern.ch/item/EDA-03098-V3-0)
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- FmcWorldFIP V1 - Bus speed 1M -
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[EDA-03098-V1-1](https://edms.cern.ch/item/EDA-03098-V1-1)
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[EDA-03098-V3-1](https://edms.cern.ch/item/EDA-03098-V3-1)
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- FmcWorldFIP V1 - Bus speed 2.5M -
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[EDA-03098-V1-2](https://edms.cern.ch/item/EDA-03098-V1-2)
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[EDA-03098-V3-2](https://edms.cern.ch/item/EDA-03098-V3-2)
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- FmcWorldFIP V1 - Bus speed 5M -
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[EDA-03098-V1-3](https://edms.cern.ch/item/EDA-03098-V1-3)
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[EDA-03098-V3-3](https://edms.cern.ch/item/EDA-03098-V3-3)
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-----
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... | ... | @@ -76,56 +72,60 @@ board](https://www.ohwr.org/project/fmc-masterfip/uploads/8363de65c8dd486f2ecf64 |
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<td><strong>Event</strong></td>
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</tr>
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<tr class="even">
|
|
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<td>01-10-2014</td>
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|
|
<td>10-2014</td>
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<td>Schematics work started</td>
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</tr>
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<tr class="odd">
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|
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<td>01-12-2014</td>
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|
|
<td>12-2014</td>
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|
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<td>Schematics ready for layout</td>
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</tr>
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|
|
<tr class="even">
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|
|
<td>27-01-2015</td>
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|
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<td>01-2015</td>
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|
|
<td>Board layout done at CERN by DEM</td>
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</tr>
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<tr class="odd">
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|
|
<td>30-01-2015</td>
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|
|
<td>01-2015</td>
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|
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<td>[Layout review](LayoutReviewJan2015)</td>
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|
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</tr>
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|
|
<tr class="even">
|
|
|
<td>17-02-2015</td>
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|
|
<td>02-2015</td>
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|
|
<td>Layout modification ready</td>
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|
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</tr>
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|
|
<tr class="odd">
|
|
|
<td>20-02-2015</td>
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|
|
<td>02-2015</td>
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|
|
<td>First brainstorm about gateware and firmware</td>
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|
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</tr>
|
|
|
<tr class="even">
|
|
|
<td>19-03-2015</td>
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|
|
<td>03-2015</td>
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|
|
<td>Production files finalised, 3 prototypes ordered</td>
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|
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</tr>
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|
|
<tr class="odd">
|
|
|
<td>13-04-2015</td>
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|
|
<td>04-2015</td>
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|
|
<td>Designer Matthieu Cattin †</td>
|
|
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</tr>
|
|
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<tr class="even">
|
|
|
<td>29-04-2015</td>
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|
|
<td>04-2015</td>
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|
|
<td>3 assembled prototypes received, 5 empty PCBs available</td>
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|
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</tr>
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|
|
<tr class="odd">
|
|
|
<td>23-07-2015</td>
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|
|
<td>07-2015</td>
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|
|
<td>One board tested that sent and received WorldFIP data. ADC not tested.</td>
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|
|
</tr>
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|
|
<tr class="even">
|
|
|
<td>18-02-2016</td>
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|
|
<td>02-2016</td>
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|
|
<td>Production Test program being written by a company. ADC testing is part of it.</td>
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|
|
</tr>
|
|
|
<tr class="odd">
|
|
|
<td>12-10-2016</td>
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|
|
<td>[Schematics review](SchReviewOct2016)</td>
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|
|
<td>10-2016</td>
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|
|
<td>[Schematics review for V2](SchReviewOct2016)</td>
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|
|
</tr>
|
|
|
<tr class="even">
|
|
|
<td>09-12-2016</td>
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|
|
<td>[Layout review](LayoutReviewDec2016)</td>
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|
|
<td>12-2016</td>
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|
|
<td>[Layout review for V2](LayoutReviewDec2016)</td>
|
|
|
</tr>
|
|
|
<tr class="odd">
|
|
|
<td>01-2017</td>
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|
|
<td><strong>Hardware V3</strong> ready for production; ADC diagnostics removed based on high production and maintenance costs</td>
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|
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</tr>
|
|
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</tbody>
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|
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</table>
|
... | ... | |