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FMC DEL 1ns 4cha
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FMC DEL 1ns 4cha
Commits
b75ccc85
Commit
b75ccc85
authored
Dec 20, 2011
by
Tomasz Wlostowski
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software/headers: adapted to V3 HW
parent
8e1858c1
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2 changed files
with
5 additions
and
5 deletions
+5
-5
fdelay_private.h
software/include/fdelay_private.h
+4
-4
pll_config.h
software/include/pll_config.h
+1
-1
No files found.
software/include/fdelay_private.h
View file @
b75ccc85
...
@@ -20,10 +20,10 @@
...
@@ -20,10 +20,10 @@
#define CS_GPIO 2
/* MCP23S17 GPIO */
#define CS_GPIO 2
/* MCP23S17 GPIO */
/* MCP23S17 GPIO expander pin locations: bit 8 = select bank 2, bits 7..0 = mask of the pin in the selected bank */
/* MCP23S17 GPIO expander pin locations: bit 8 = select bank 2, bits 7..0 = mask of the pin in the selected bank */
#define SGPIO_TERM_EN (
0x100 | (1<<7))
/* Input termination enable (1 = on) */
#define SGPIO_TERM_EN (
1<<0)
/* Input termination enable (1 = on) */
#define SGPIO_
LED_TERM (0x100 | (1<<2))
/* Termination enable LED
(1 = on) */
#define SGPIO_
OUTPUT_EN(x) (1<<(6-x))
/* Output driver enable
(1 = on) */
#define SGPIO_
DRV_OEN (0x100 | (1<<0))
/* Output driver enable (0 = on
) */
#define SGPIO_
TRIG_SEL (1<<3)
/* TDC trigger select (0 = trigger input, 1 = FPGA
) */
#define SGPIO_
TRIG_SEL (0x100 | (1<<3))
/* TDC trigger select (0 = trigger input, 1 = FPGA
) */
#define SGPIO_
CAL_EN (1<<3)
/* Calibration mode enable (0 = on
) */
/* ACAM TDC operation modes */
/* ACAM TDC operation modes */
#define ACAM_RMODE 0
#define ACAM_RMODE 0
...
...
software/include/pll_config.h
View file @
b75ccc85
...
@@ -36,7 +36,7 @@ const struct {int reg; uint8_t val; } ad9516_regs[] = {
...
@@ -36,7 +36,7 @@ const struct {int reg; uint8_t val; } ad9516_regs[] = {
{
0x00F1
,
0x08
},
{
0x00F1
,
0x08
},
{
0x00F2
,
0x08
},
{
0x00F2
,
0x08
},
{
0x00F3
,
0x08
},
{
0x00F3
,
0x08
},
{
0x00F4
,
0x0
8
},
{
0x00F4
,
0x0
0
},
{
0x00F5
,
0x08
},
{
0x00F5
,
0x08
},
{
0x0140
,
0x5A
},
{
0x0140
,
0x5A
},
{
0x0141
,
0x5A
},
{
0x0141
,
0x5A
},
...
...
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