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FMC DEL 1ns 4cha
Commits
b4495e8a
Commit
b4495e8a
authored
Jun 08, 2012
by
Tomasz Wlostowski
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software/python: library based on SPEC driver
parent
e9ab8ca8
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2 changed files
with
47 additions
and
49 deletions
+47
-49
demo.py
software/python/demo.py
+1
-6
fdelay_lib.py
software/python/fdelay_lib.py
+46
-43
No files found.
software/python/demo.py
View file @
b4495e8a
...
@@ -74,12 +74,7 @@ if __name__ == "__main__":
...
@@ -74,12 +74,7 @@ if __name__ == "__main__":
print
(
"Sorry, I must be run as root..."
);
print
(
"Sorry, I must be run as root..."
);
sys
.
exit
(
-
1
)
sys
.
exit
(
-
1
)
fd
=
os
.
open
(
"/dev/rawrabbit"
,
os
.
O_SYNC
)
card
=
FineDelay
()
if
(
fd
<
0
):
print
(
"Can't open the rawrabbit device. Is the rawrabbit driver installed?"
)
sys
.
exit
(
-
1
)
card
=
FineDelay
(
fd
)
app
=
QApplication
(
sys
.
argv
)
app
=
QApplication
(
sys
.
argv
)
...
...
software/python/fdelay_lib.py
View file @
b4495e8a
...
@@ -22,33 +22,43 @@ class fd_timestamp(Structure):
...
@@ -22,33 +22,43 @@ class fd_timestamp(Structure):
return
"
%
d:
%
d"
%
(
self
.
utc
,
self
.
nsecs
())
return
"
%
d:
%
d"
%
(
self
.
utc
,
self
.
nsecs
())
class
FineDelay
:
class
FineDelay
:
BASE_ADDR
=
0x80000
BASE_ADDR
=
0x80000
FREE_RUNNING
=
0x10
def
__init__
(
self
,
bus
=
-
1
):
WR_OFFLINE
=
0x8
self
.
fdelay
=
CDLL
(
'../lib/libfinedelay.so'
)
WR_READY
=
0x1
WR_SYNCING
=
0x2
# load the firmware for the SPEC:
WR_SYNCED
=
0x4
SYNC_LOCAL
=
0x1
self
.
card
=
self
.
fdelay
.
spec_open
(
c_int
(
bus
),
c_int
(
-
1
));
SYNC_WR
=
0x2
if
(
self
.
card
==
0
):
print
(
"SPEC enumeration failed"
);
sys
.
exit
(
-
1
)
if
~
os
.
path
.
isfile
(
"spec_top_fd.bin"
):
print
(
"No firmware file found. Attempting to download one from OHWR"
)
import
urllib
urllib
.
urlretrieve
(
"http://www.ohwr.org/attachments/download/1350/spec_top.bin"
,
"spec_top_fd.bin"
)
cwd
=
os
.
getcwd
();
def
__init__
(
self
,
fd
):
if
(
self
.
fdelay
.
spec_load_bitstream
(
c_voidp
(
self
.
card
),
c_char_p
(
cwd
+
"/spec_top_fd.bin"
))
<
0
):
cwd
=
os
.
path
.
dirname
(
__file__
)
print
(
"Firmware loader failure"
);
self
.
fdelay
=
CDLL
(
cwd
+
'/../lib/libfinedelay.so'
)
sys
.
exit
(
-
1
)
self
.
handle
=
c_voidp
(
self
.
fdelay
.
fdelay_create_rawrabbit
(
c_int
(
fd
),
c_ulong
(
self
.
BASE_ADDR
)));
self
.
fdelay
.
spec_close
(
c_voidp
(
self
.
card
))
if
(
c_int
(
self
.
fdelay
.
fdelay_load_firmware
(
"../spec_top_wr.bin"
))
<
0
):
self
.
handle
=
pointer
(
create_string_buffer
(
'
\000
'
*
16384
))
#allocate some memory for the fdelay_device_t
print
(
"Firmware loader failed..."
);
if
(
self
.
fdelay
.
spec_fdelay_create_bd
(
self
.
handle
,
c_int
(
bus
),
c_int
(
-
1
),
c_ulong
(
self
.
BASE_ADDR
))
<
0
):
print
(
"FD enumeration failed"
)
sys
.
exit
(
-
1
)
sys
.
exit
(
-
1
)
print
"Initialis
ing Fine Delay board..."
print
"Initializ
ing Fine Delay board..."
if
(
self
.
fdelay
.
fdelay_init
(
self
.
handle
)
<
0
):
if
(
self
.
fdelay
.
fdelay_init
(
self
.
handle
)
<
0
):
print
(
"Init failed.."
);
print
(
"Init failed.."
);
sys
.
exit
(
-
1
)
sys
.
exit
(
-
1
)
def
conf_trigger
(
self
,
enable
,
termination
):
def
conf_trigger
(
self
,
enable
,
termination
):
self
.
fdelay
.
fdelay_configure_trigger
(
self
.
handle
,
c_int
(
enable
),
c_int
(
termination
))
self
.
fdelay
.
fdelay_configure_trigger
(
self
.
handle
,
c_int
(
enable
),
c_int
(
termination
))
...
@@ -77,14 +87,7 @@ class FineDelay:
...
@@ -77,14 +87,7 @@ class FineDelay:
return
t
return
t
def
get_sync_status
(
self
):
def
get_sync_status
(
self
):
htab
=
{
self
.
FREE_RUNNING
:
"oscillator free-running"
,
return
"none"
;
#fixme: new WR state machine
self
.
WR_OFFLINE
:
"WR core offline"
,
self
.
WR_READY
:
"WR core ready"
,
self
.
WR_SYNCING
:
"Syncing local clock with WR"
,
self
.
WR_SYNCED
:
"Synced with WR"
}
# status = c_int(self.fdelay.fdelay_get_sync_status(self.handle));
# print("GetSyncStatus %x" % status.value);
return
"none"
;
#htab[status.value]
def
read_ts
(
self
):
def
read_ts
(
self
):
buf
=
(
fd_timestamp
*
256
)();
buf
=
(
fd_timestamp
*
256
)();
...
...
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