... | ... | @@ -20,14 +20,6 @@ use LEMO 00 connectors** |
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- [Technical specification
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draft](https://www.ohwr.org/project/fmc-delay-1ns-8cha/uploads/364be2448542f8ef28b8da276df0436c/FMC_delay_1ns_4_CH_spec.pdf)
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- Baseline solution: TDC at the inputs followed by coarse count in the
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FPGA and fine delay chips at the outputs. To be considered for
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improving jitter: monolithic FFs in the FMC, before the fine delay
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chips. Continuous calibration of fine delay chips might be needed to
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compensate for Process-Voltage-Temperature (PVT) effects. The
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timebase is from a local TCXO on FMC card and needs calibration. The
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4ppm accuracy will only be reached when used on a White Rabbit
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enabled FMC carrier.
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-----
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