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# Driver developers information
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## Memory map
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### Fine Delay Core internals
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This is the mapping of the internal FD core components with respect to
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the core's base address
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<table>
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<thead>
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<tr class="header">
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<th align="center">Wishbone Cores</th>
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</tr>
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</thead>
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<tbody>
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<tr class="odd">
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<td align="center">* Offset (bytes) *</td>
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<td><b> Description </b></td>
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<td><b> Peripherals </b></td>
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<td><b> Internal mapping </b></td>
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<td><b> Status </b></td>
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</tr>
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<tr class="even">
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<td align="center">0x000</td>
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<td>Main Registers</td>
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<td>FD Core shared control registers (TDC and global configuration)</td>
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<td>[wbgen2 doc](https://www.ohwr.org/project/fmc-delay-1ns-8cha/blob/master/hdl/rtl/doc/fd_main_regs.html)</td>
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<td>Available</td>
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</tr>
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<tr class="odd">
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<td align="center">0x100</td>
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<td>Channel 1 Registers</td>
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<td>FD Core output channel 1 control registers (delay/pulse gen settings)</td>
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<td>[wbgen2 doc](https://www.ohwr.org/project/fmc-delay-1ns-8cha/blob/master/hdl/rtl/doc/fd_channel_regs.html)</td>
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<td>Available</td>
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</tr>
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<tr class="even">
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<td align="center">0x200</td>
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<td>Channel 2 Registers</td>
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<td>FD Core output channel 2 control registers (delay/pulse gen settings)</td>
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<td>[wbgen2 doc](https://www.ohwr.org/project/fmc-delay-1ns-8cha/blob/master/hdl/rtl/doc/fd_channel_regs.html)</td>
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<td>Available</td>
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</tr>
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<tr class="odd">
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<td align="center">0x300</td>
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<td>Channel 3 Registers</td>
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<td>FD Core output channel 3 control registers (delay/pulse gen settings)</td>
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<td>[wbgen2 doc](https://www.ohwr.org/project/fmc-delay-1ns-8cha/blob/master/hdl/rtl/doc/fd_channel_regs.html)</td>
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<td>Available</td>
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</tr>
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<tr class="even">
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<td align="center">0x400</td>
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<td>Channel 4 Registers</td>
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<td>FD Core output channel 4 control registers (delay/pulse gen settings)</td>
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<td>[wbgen2 doc](https://www.ohwr.org/project/fmc-delay-1ns-8cha/blob/master/hdl/rtl/doc/fd_channel_regs.html)</td>
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<td>Available</td>
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</tr>
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<tr class="odd">
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<td align="center">0x500</td>
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<td>FMC 1-wire master</td>
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<td>Thermometer + unique ID (on the respective FMC)</td>
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<td>[registers](http://opencores.org/websvn,filedetails?repname=sockit_owm&path=%2Fsockit_owm%2Ftrunk%2Fdoc%2Fsockit_owr.pdf)</td>
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<td>Available</td>
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</tr>
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</tbody>
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</table>
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